MK2049-45

Part Number	MK2049-45
Manufacturer	Renesas (https://www.renesas.com/)
Title	CLOCK PLL
Description	The MK2049-45A is a dual Phase-Locked Loop (PLL) device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based ...
Features	• Packaged in 20-pin SOIC • 3.3 V + 5% operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 MHz • Locks to 8 kHz + 100 ppm (...
Datasheet	MK2049-45 pdf datasheet

Part Number	MK2049-45
Manufacturer	Renesas
Title	CLOCK PLL
Description	The MK2049-45 is a dual Phase-Locked Loop (PLL) device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based a.
Features	• Packaged in 20 pin SOIC • 3.3 V + 5% operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 MHz • Locks to 8 kHz + 100 ppm (.
Datasheet	MK2049-45 pdf datasheet

Part Number	MK2049-45
Manufacturer	Integrated Circuit Systems
Title	3.3V Communications Clock PLL
Description	The MK2049-45 is a dual Phase-Locked Loop (PLL) device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based a.
Features	• Packaged in 20 pin SOIC • 3.3 V + 5% operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 MHz Locks to 8 kHz + 100 ppm (Exte.
Datasheet	MK2049-45 pdf datasheet