IDT72T51256 Datasheet

IDT72T51256 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES

The IDT72T51236/72T51246/72T51256 multi-queue flow-control devices are single chip within which anywhere between 1 and 4 discrete FIFO queues can be setup. All queues within the device have a common data input bus, (write port) and a common data output bus, (read port). Data written into the write .

Features

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• Choose from among the following memory density options: IDT72T51236  Total Available Memory = 589,824 bits IDT72T51246  Total Available Memory = 1,179,648 bits IDT72T51256  Total Available Memory = 2,359,296 bits Configurable from 1 to 4 Queues Queues may be configured at master reset from the pool of Total Available Memory in blocks of 256 x 36 Independent Read and Write access per queue User programmable via serial port User selectable I/O: 2.5V LVTTL, 1.5V HSTL, 1.8V eHSTL Default multi-queue device configurations -IDT72T51236: 4,096 x 36 x 4Q -IDT72T51246: 8,.