HYB39S16800AT-10 Datasheet

HYB39S16800AT-10 16 MBit Synchronous DRAM

VDD VSS VDDQ VSSQ NC Semiconductor Group 2 1998-10-01 HYB 39S16400/800/160AT-8/-10 www.DataSheet4U.com 16 MBit Synchronous DRAM VDD DQ0 VSSQ DQ1 VDDQ DQ2 VSSQ DQ3 VDDQ N.C. N.C. WE CAS RAS CS A11 A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 3.

Features

uential type 1, 2, 4, 8 for Interleave type The HYB 39S1640x/80x/16xAT are dual bank Synchronous DRAM’s based on the die revisions “B” and “C” and organized as 2 banks × 2 MBit × 4, 2 banks × 1 MBit × 8 and 2 banks × 512 kBit × 16 respectively. These synchronous devices achieve high speed data transfer rates up to 125 MHz by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock. The chip is fabricated with SIEMENS advanced 16 MBit DRAM process technology. The device is designed to comply with all JEDEC standards set for synchronous.