SN74AUP2G07 Datasheet

SN74AUP2G07 Low-Power Dual Buffer/Driver

The SN74AUP2G07 device is a dual buffer gate with open drain output that operates from 0.8 V to 3.6 V. Device Information PART NUMBER PACKAGE (1) BODY SIZE (NOM) SC70 (6) 3.00 mm × 1.25 mm SN74AUP2G07 SON (6) SON (6) 1.45 mm × 1.00 mm 1.00 mm × 1.00 mm DSBGA (6) 1.16 mm × 0.76 mm (1) Fo.

Features

• Low static-power consumption (ICC = 0.9 µA maximum)
• Low dynamic-power consumption (Cpd = 1 pF typical at 3.3 V)
• Low input capacitance (Ci = 1.5 pF typical)
• Low noise
  – overshoot and undershoot <10% of VCC
• Ioff supports live insertion, partial-power-down mode, and back-drive protection
• Input hysteresis allows slow input transition and better switching noise immunity at the input (Vhys = 250 mV typical at 3.3 V)
• Wide operating VCC range of 0.8 V to 3.6 V
• Optimized for 3.3 V operation
• 3.6-V I/O tolerant to support mixed-mode signal operation
• tpd = 3.3 ns maximum at 3.3 V
• Sui.