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ATtiny212 Datasheet PDF

Microchip
Part Number ATtiny212
Manufacturer Microchip
Title Microcontroller
Description ATtiny212/214/412/414/416 tinyAVR® 1-series Introduction The ATtiny212/214/412/414/416 are members of the tinyAVR®1-series of microcontrollers, us...
Features and Core Independent Peripherals (CIPs). Attention:  Automotive products are documented in separate data sheets. Features
• CPU
  – AVR® CPU
  – Running at up to 20 MHz
  – Single-cycle I/O access
  – Two-level interrupt controller
  – Two-cycle hardware multiplier
• Memories
  – 2/4 KB In-system self-program...

File Size 4.57MB
Datasheet PDF File ATtiny212 PDF File


ATtiny212 ATtiny212 ATtiny212




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ATTINY20 : VCC Supply voltage. 1.5.2 GND Ground. 1.5.3 RESET Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running and provided the reset pin has not been disabled. The minimum pulse length is given in Table 20-4 on page 170. Shorter pulses are not guaranteed to generate a reset. The reset pin can also be used as a (weak) I/O pin. 1.5.4 Port A (PA7:PA0) Port A is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port A output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port A pins that are externally pulled low will sou.

ATtiny202 : ATtiny202/204/402/404/406 Automotive tinyAVR® 0-series Introduction The ATtiny202/204/402/404/406 Automotive are members of the tinyAVR® 0-series of microcontrollers, using the AVR® processor with hardware multiplier, running at up to 16 MHz, with 2/4 KB Flash, 128/256 bytes of SRAM, and 64/128 bytes of EEPROM in an 8-, 14-, 20-pin package. The tinyAVR® 0-series uses the latest technologies, with a flexible, low-power architecture including Event System and SleepWalking, accurate analog features, and Core Independent Peripherals. Features • CPU: – AVR® CPU – Running at up to 16 MHz – Single-cycle I/O access – Two-level interrupt controller – Two-cycle hardware multiplier • Memories: – 2/4 K.

ATtiny202 : ATtiny202/402 AVR® Microcontroller with Core Independent Peripherals and picoPower® Technology Introduction The ATtiny202/402 microcontrollers are using the high-performance, low-power AVR® RISC architecture, and are capable of running at up to 20 MHz, with up to 2/4 KB Flash, 128/256 bytes of SRAM, and 64/128 bytes of EEPROM in a 8-pin package. The series uses the latest technologies with a flexible and low-power architecture including Event System and SleepWalking, accurate analog features, and advanced peripherals. Features • CPU: – AVR® 8-bit CPU – Running at up to 20 MHz – Single cycle I/O access – Two-level interrupt controller – Two-cycle hardware multiplier • Memories: – 2/4 KB In-sy.

ATtiny204 : ATtiny202/204/402/404/406 Automotive tinyAVR® 0-series Introduction The ATtiny202/204/402/404/406 Automotive are members of the tinyAVR® 0-series of microcontrollers, using the AVR® processor with hardware multiplier, running at up to 16 MHz, with 2/4 KB Flash, 128/256 bytes of SRAM, and 64/128 bytes of EEPROM in an 8-, 14-, 20-pin package. The tinyAVR® 0-series uses the latest technologies, with a flexible, low-power architecture including Event System and SleepWalking, accurate analog features, and Core Independent Peripherals. Features • CPU: – AVR® CPU – Running at up to 16 MHz – Single-cycle I/O access – Two-level interrupt controller – Two-cycle hardware multiplier • Memories: – 2/4 K.

ATtiny204 : ATtiny204/404 AVR® Microcontroller with Core Independent Peripherals and picoPower® Technology Introduction The ATtiny204/404 microcontrollers are using the high-performance, low-power AVR® RISC architecture, and are capable of running at up to 20 MHz, with up to 2/4 KB Flash, 128/256 bytes of SRAM, and 64/128 bytes of EEPROM in a 14-pin package. The series uses the latest technologies with a flexible and low-power architecture including Event System and SleepWalking, accurate analog features, and advanced peripherals. Features • CPU: – AVR® 8-bit CPU – Running at up to 20 MHz – Single cycle I/O access – Two-level interrupt controller – Two-cycle hardware multiplier • Memories: – 2/4 KB In-s.

ATtiny214 : ATtiny212/214/412/414/416 tinyAVR® 1-series Introduction The ATtiny212/214/412/414/416 are members of the tinyAVR®1-series of microcontrollers, using the AVR® processor with hardware multiplier, running at up to 20 MHz, with 2/4 KB Flash, 128/256 bytes of SRAM, and 64/128 bytes of EEPROM in a 8-, 14-, and 20-pin package. The tinyAVR®1-series uses the latest technologies with a flexible, lowpower architecture, including Event System, accurate analog features, and Core Independent Peripherals (CIPs). Attention:  Automotive products are documented in separate data sheets. Features • CPU – AVR® CPU – Running at up to 20 MHz – Single-cycle I/O access – Two-level interrupt controller – Two-cycle .

ATTINY22L : The ATtiny22L is a low-power CMOS 8-bit microcontroller based on the AVR RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny22L achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), Pin Configuration PDIP/SOIC RESET PB3 PB4 GND 1 2 3 4 8 7 6 5 VCC PB2 (SCK/T0) PB1 (MISO/INT0) PB0 (MOSI) Rev. 1273BS–02/00 DataSheet4U.com Note: This is a summary document. For the complete 56-page document, please visit our .

ATtiny2313 : Features • Utilizes the AVR® RISC Architecture • AVR – High-performance and Low-power RISC Architecture – 120 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation – Up to 20 MIPS Throughput at 20 MHz • Data and Non-volatile Program and Data Memories – 2K Bytes of In-System Self Programmable Flash Endurance 10,000 Write/Erase Cycles – 128 Bytes In-System Programmable EEPROM Endurance: 100,000 Write/Erase Cycles – 128 Bytes Internal SRAM – Programming Lock for Flash Program and EEPROM Data Security • Peripheral Features – One 8-bit Timer/Counter with Separate Prescaler and Compare Mode – One 16-bit Timer/Counter with Sepa.

ATtiny2313A : Features • High Performance, Low Power AVR® 8-Bit Microcontroller • Advanced RISC Architecture – 120 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation – Up to 20 MIPS Throughput at 20 MHz • Data and Non-volatile Program and Data Memories – 2/4K Bytes of In-System Self Programmable Flash • Endurance 10,000 Write/Erase Cycles – 128/256 Bytes In-System Programmable EEPROM • Endurance: 100,000 Write/Erase Cycles – 128/256 Bytes Internal SRAM – Programming Lock for Flash Program and EEPROM Data Security • Peripheral Features – One 8-bit Timer/Counter with Separate Prescaler and Compare Mode – One 16-bit Timer/Counter with.

ATtiny2313V : Features • Utilizes the AVR® RISC Architecture • AVR – High-performance and Low-power RISC Architecture – 120 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation – Up to 20 MIPS Throughput at 20 MHz • Data and Non-volatile Program and Data Memories – 2K Bytes of In-System Self Programmable Flash Endurance 10,000 Write/Erase Cycles – 128 Bytes In-System Programmable EEPROM Endurance: 100,000 Write/Erase Cycles – 128 Bytes Internal SRAM – Programming Lock for Flash Program and EEPROM Data Security • Peripheral Features – One 8-bit Timer/Counter with Separate Prescaler and Compare Mode – One 16-bit Timer/Counter with Sepa.

ATTINY24 : 2.3.1 VCC Supply voltage. 2.3.2 GND Ground. 2.3.3 Port B (PB3...PB0) Port B is a 4-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability except PB3, which has the RESET capability. To use pin PB3 as an I/O pin instead of RESET pin, program (‘0’) RSTDISBL fuse. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B also serves the functions of various special features of the Atmel ATti.

ATtiny24A : . 9 2 Overview . 10 3 General Information . 12 3.1 Resources . 12 3.2 Code Examples ..... 12 3.3 Capacitive Touch Sensing . 12 3.4 Data Retention....

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