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ATtiny9

Part Number ATtiny9
Manufacturer Microchip
Title CMOS 8-bit microcontroller
Description ATtiny4/5/9/10 tinyAVR® Data Sheet Introduction The ATtiny4/5/9/10 is a low power, CMOS 8-bit microcontrollers based on the AVR® enhanced RISC arc...
Features
• High Performance, Low Power AVR® 8-Bit Microcontroller
• Advanced RISC Architecture
  – 54 Powerful Instructions
  – Most Single Clock Cycle Execution
  – 16 x 8 General Purpose Working Registers
  – Fully Static Operation
  – Up to 12 MIPS Throughput at 12 MHz
• Non-volatile Program and Data Memories
  – 512...

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ATtiny10 : 8-bit AVR Microcontroller ATtiny4 / ATtiny5 / ATtiny9 / ATtiny10 DATASHEET COMPLETE Introduction The Atmel® ATtiny4/5/9/10 is a low-power CMOS 8-bit microcontroller based on the AVR® enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny4/5/9/10 achieves throughputs close to 1 MIPS per MHz. This empowers system designer to optimize the device for power consumption versus processing speed. Feature • High Performance, Low Power AVR® 8-Bit Microcontroller • Advanced RISC Architecture – 54 Powerful Instructions – Most Single Clock Cycle Execution – 16 x 8 General Purpose Working Registers – Fully Static Operation – Up to 12 MIPS Throughput at 12 MHz • .

ATtiny10 : ATtiny4/5/9/10 tinyAVR® Data Sheet Introduction The ATtiny4/5/9/10 is a low power, CMOS 8-bit microcontrollers based on the AVR® enhanced RISC architecture. The ATtiny4/5/9/10 is a 6/8-pins device ranging from 512 Bytes to 1024 Bytes Flash, with 32 Bytes SRAM. By executing instructions in a single clock cycle, the devices achieve CPU throughput approaching one million instructions per second (MIPS) per megahertz, allowing the system designer to optimize power consumption versus processing speed. Features • High Performance, Low Power AVR® 8-Bit Microcontroller • Advanced RISC Architecture – 54 Powerful Instructions – Most Single Clock Cycle Execution – 16 x 8 General Purpose Working Register.

ATtiny102 : 8-bit AVR Microcontroller ATtiny102 / ATtiny104 DATASHEET COMPLETE Introduction The Atmel® ATtiny102/ATtiny104 is a low-power CMOS 8-bit microcontroller based on the AVR® enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny102/ATtiny104 achieves throughputs close to 1 MIPS per MHz. This empowers system designer to optimize the device for power consumption versus processing speed. Feature High Performance, Low Power Atmel® AVR® 8-Bit Microcontroller Family • Advanced RISC Architecture – 54 Powerful Instructions – Mostly Single Clock Cycle Execution – 16 x 8 General Purpose Working Registers – Fully Static Operation – Up to 12 MIPS Throughput at 12.

ATtiny104 : 8-bit AVR Microcontroller ATtiny102 / ATtiny104 DATASHEET COMPLETE Introduction The Atmel® ATtiny102/ATtiny104 is a low-power CMOS 8-bit microcontroller based on the AVR® enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny102/ATtiny104 achieves throughputs close to 1 MIPS per MHz. This empowers system designer to optimize the device for power consumption versus processing speed. Feature High Performance, Low Power Atmel® AVR® 8-Bit Microcontroller Family • Advanced RISC Architecture – 54 Powerful Instructions – Mostly Single Clock Cycle Execution – 16 x 8 General Purpose Working Registers – Fully Static Operation – Up to 12 MIPS Throughput at 12.

ATtiny11 : Features • Utilizes the AVR® RISC Architecture • High-performance and Low-power 8-bit RISC Architecture – 90 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Up to 8 MIPS Throughput at 8 MHz • Nonvolatile Program and Data Memory – 1K Byte of Flash Program Memory In-System Programmable (ATtiny12) Endurance: 1,000 Write/Erase Cycles (ATtiny11/12) – 64 Bytes of In-System Programmable EEPROM Data Memory for ATtiny12 Endurance: 100,000 Write/Erase Cycles – Programming Lock for Flash Program and EEPROM Data Security • Peripheral Features – Interrupt and Wake-up on Pin Change – One 8-bit Timer/Counter with Separate Prescaler – On-chip Analog Com.

ATtiny12 : Features • Utilizes the AVR® RISC Architecture • High-performance and Low-power 8-bit RISC Architecture – 90 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Up to 8 MIPS Throughput at 8 MHz • Nonvolatile Program and Data Memory – 1K Byte of Flash Program Memory In-System Programmable (ATtiny12) Endurance: 1,000 Write/Erase Cycles (ATtiny11/12) – 64 Bytes of In-System Programmable EEPROM Data Memory for ATtiny12 Endurance: 100,000 Write/Erase Cycles – Programming Lock for Flash Program and EEPROM Data Security • Peripheral Features – Interrupt and Wake-up on Pin Change – One 8-bit Timer/Counter with Separate Prescaler – On-chip Analog Com.

ATtiny13 : Features • High Performance, Low Power AVR® 8-Bit Microcontroller • Advanced RISC Architecture – 120 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation – Up to 20 MIPS Througput at 20 MHz • High Endurance Non-volatile Memory segments – 1K Bytes of In-System Self-programmable Flash program memory – 64 Bytes EEPROM – 64 Bytes Internal SRAM – Write/Erase cyles: 10,000 Flash/100,000 EEPROM – Data retention: 20 years at 85°C/100 years at 25°C (see page 6) – Programming Lock for Self-Programming Flash & EEPROM Data Security • Peripheral Features – One 8-bit Timer/Counter with Prescaler and Two PWM Channels – 4-channel, 10-b.

ATTINY13A : VCC Supply voltage. 1.1.2 GND Ground. 1.1.3 Port B (PB5:PB0) Port B is a 6-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B also serves the functions of various special features of the ATtiny13A as listed on page 55. 1.1.4 RESET Reset input. A low level on this pin for longer than the minimum pulse length will generate a re.

ATtiny13A : .. 2 2 Overview ... 3 2.1 Block Diagram ... 3 3 About ... 5 3.1 Resources ... 5 3.2 Code Examples . 5 3.3 Data R.

ATtiny13V : Features • High Performance, Low Power AVR® 8-Bit Microcontroller • Advanced RISC Architecture – 120 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation – Up to 20 MIPS Througput at 20 MHz • High Endurance Non-volatile Memory segments – 1K Bytes of In-System Self-programmable Flash program memory – 64 Bytes EEPROM – 64 Bytes Internal SRAM – Write/Erase cyles: 10,000 Flash/100,000 EEPROM – Data retention: 20 years at 85°C/100 years at 25°C (see page 6) – Programming Lock for Self-Programming Flash & EEPROM Data Security • Peripheral Features – One 8-bit Timer/Counter with Prescaler and Two PWM Channels – 4-channel, 10-b.

ATtiny15 : The ATtiny15 is a low-power CMOS 8-bit microcontroller based on the AVR RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny15 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed (continued) Pin Configurations PDIP/SOIC (RESET/ADC0) PB5 (ADC3) PB4 (ADC2) PB3 GND 1 2 3 4 8 VCC 7 PB2 (SCK/ADC1/T0/INT0) 6 PB1 (MISO/AIN1/OCP) 5 P.

ATTINY15L : Features • High-performance, Low-power AVR® 8-bit Microcontroller • Advanced RISC Architecture – 90 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation • Non-volatile Program and Data Memories – 1K Byte In-System Programmable Flash Program Memory Endurance: 1,000 Write/Erase Cycles – 64 Bytes EEPROM Endurance: 100,000 Write/Erase Cycles – Programming Lock for Flash Program Data Security • Peripheral Features – Interrupt and Wake-up on Pin Change – Two 8-bit Timer/Counters with Separate Prescalers – One 150 kHz, 8-bit High-speed PWM Output – 4-channel 10-bit ADC One Differential Voltage Input with Optional Gain of 20x –.

ATtiny1607 : ATtiny807/1607 AVR® Microcontroller with Core Independent Peripherals and picoPower® Technology Introduction The ATtiny807/1607 microcontrollers are using the high-performance, low-power AVR® RISC architecture, and are capable of running at up to 20 MHz, with up to 8/16 KB Flash, 512/1024 bytes of SRAM, and 128/256 bytes of EEPROM in a 24-pin package. The series uses the latest technologies with a flexible and low-power architecture including Event System and SleepWalking, accurate analog features and advanced peripherals. Features • CPU: – AVR® 8-bit CPU – Running at up to 20 MHz – Single cycle I/O access – Two-level interrupt controller – Two-cycle hardware multiplier • Memories: – 8/16 KB.

ATtiny1614 : ATtiny1614/1616/1617 tinyAVR® 1-series Introduction The ATtiny1614/1616/1617 are members of the tinyAVR® 1-series of microcontrollers, using the AVR® processor with hardware multiplier, running at up to 20 MHz, with 16 KB Flash, 2 KB of SRAM, and 256 bytes of EEPROM in a 14-, 20- and 24-pin package. The tinyAVR® 1-series uses the latest technologies with a flexible, low-power architecture, including Event System, accurate analog features, and Core Independent Peripherals (CIPs). Capacitive touch interfaces with Driven Shield+ and Boost Mode technologies are supported with the integrated Peripheral Touch Controller (PTC). Attention:  Automotive products are documented in separate data sheets..

ATtiny1616 : ATtiny1614/1616/1617 tinyAVR® 1-series Introduction The ATtiny1614/1616/1617 are members of the tinyAVR® 1-series of microcontrollers, using the AVR® processor with hardware multiplier, running at up to 20 MHz, with 16 KB Flash, 2 KB of SRAM, and 256 bytes of EEPROM in a 14-, 20- and 24-pin package. The tinyAVR® 1-series uses the latest technologies with a flexible, low-power architecture, including Event System, accurate analog features, and Core Independent Peripherals (CIPs). Capacitive touch interfaces with Driven Shield+ and Boost Mode technologies are supported with the integrated Peripheral Touch Controller (PTC). Attention:  Automotive products are documented in separate data sheets..

ATtiny1617 : ATtiny1614/1616/1617 tinyAVR® 1-series Introduction The ATtiny1614/1616/1617 are members of the tinyAVR® 1-series of microcontrollers, using the AVR® processor with hardware multiplier, running at up to 20 MHz, with 16 KB Flash, 2 KB of SRAM, and 256 bytes of EEPROM in a 14-, 20- and 24-pin package. The tinyAVR® 1-series uses the latest technologies with a flexible, low-power architecture, including Event System, accurate analog features, and Core Independent Peripherals (CIPs). Capacitive touch interfaces with Driven Shield+ and Boost Mode technologies are supported with the integrated Peripheral Touch Controller (PTC). Attention:  Automotive products are documented in separate data sheets..

ATtiny1624 : Use this identifier for ordering purposes. Check with your Microchip Sales Office for package availability with the Tape and Reel option. Note:  The VAO variants have been designed, manufactured, tested, and qualified per AEC-Q100 requirements for automotive applications. These products may use a different package than non-VAO parts and have additional specifications in their Electrical Characteristics. Memory Overview The following table shows the memory overview of the entire family, but further documentation describes only the ATtiny1624/1626/1627 devices. Table 1. Memory Overview Device ATtiny424 ATtiny426 ATtiny427 ATtiny824 ATtiny826 ATtiny827 ATtiny1624 ATtiny1626 ATtiny1627 A.




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