TMS320F2811 Datasheet

TMS320F2811 Digital Signal Processors

The TMS320F2810, TMS320F2811, and TMS320F2812-Q1 devices, members of the TMS320C28x DSP generation, are highly integrated, high-performance solutions for demanding control applications. Throughout this document, TMS320F2810, TMS320F2811, and TMS320F2812-Q1 are abbreviated as F2810, F2811, and F281.

Features

• High-performance static CMOS technology
  – 150 MHz (6.67-ns cycle time)
  – Low-power (1.8-V core at 135 MHz, 1.9-V core at 150 MHz, 3.3-V I/O) design
• JTAG boundary scan support
  – IEEE Standard 1149.1-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture
• High-performance 32-bit CPU (TMS320C28x)
  – 16 × 16 and 32 × 32 MAC operations
  – 16 × 16 dual MAC
  – Harvard bus architecture
  – Atomic operations
  – Fast interrupt response and processing
  – Unified memory programming model
  – 4M linear program/data address reach
  – Code-efficient (in C/C++ and Assembly)
  – TMS320F24x/LF240x processor.