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SN65LVDS18

Texas Instruments

2.5-V/3.3-V OSCILLATOR GAIN STAGE/BUFFERS

www.ti.com SN65LVDS18, SN65LVP18 SN65LVDS19, SN65LVP19 SLLS624B – SEPTEMBER 2004 – REVISED NOVEMBER 2005 2.5-V/3.3-V OS...


SN65LVDS18

Texas Instruments


Octopart Stock #: O-1491269

Findchips Stock #: 1491269-F

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www.ti.com SN65LVDS18, SN65LVP18 SN65LVDS19, SN65LVP19 SLLS624B – SEPTEMBER 2004 – REVISED NOVEMBER 2005 2.5-V/3.3-V OSCILLATOR GAIN STAGE/BUFFERS FEATURES • Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs • Clock Rates to 1 GHz – 250-ps Output Transition Times – 0.12 ps Typical Intrinsic Phase Jitter – Less than 630 ps Propagation De
More View lay Times • 2.5-V or 3.3-V Supply Operation • 2-mm x 2-mm Small-Outline No-Lead Package APPLICATIONS • PECL-to-LVDS Translation • Clock Signal Amplification DESCRIPTION These four devices are high frequency oscillator gain stages supporting both LVPECL or LVDS on the high gain outputs in 3.3-V or 2.5-V systems. Additionally, provides the option of both single-ended input (PECL levels on the SN65LVx18) and fully differential inputs on the SN65LVx19. The SN65LVx18 provides the user a Gain Control (GC) for controlling the Q output from 300 mV to 860 mV either by leaving it open (NC), grounded, or tied to VCC. (When left open, the Q output defaults to 575 mV.) The Q on the SN65LVx19 defaults to 575 mV as well. Both devices provide a voltage reference (VBB) of typically 1.35 V below VCC for use in receiving single-ended PECL input signals. When not used, VBB should be unconnected or open. All devices are characterized for operation from –40°C to 85°C. SN65LVDS18, SN65LVP18 Q 4 mA SN65LVDS19, SN65LVP19 Q 4 mA A VBB GC VREF VCC Y A Z B VBB EN Y Z VREF VCC EN Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2005, Texas Instruments Incorporated SN65LVDS18, SN65LVP18 SN65LVDS19, SN65LVP19 SLLS624B – SEPTEMBER 2004 – REVISED NOVEMBER 2005 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. AVAILABLE OPTIONS(1) INPUT Single-ended Single-ended Differential Differential OUTPUT LVDS LVPECL LVDS LVPECL GAIN CONTROL Yes Yes No No BASE PART NUMBER SN65LVDS18 SN65LVP18 SN65LVDS19 SN65LVP19 PART MARKING ER EP ET ES (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VCC Supply voltage (2) VI Input voltage VO Output voltage IO VBB output current HBM electrostatic disch






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