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74HCT30

NXP

8-Input NAND Gate

74HC30; 74HCT30 8-input NAND gate Rev. 6 — 27 December 2012 Product data sheet 1. General description The 74HC30; 74H...


NXP

74HCT30

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Description
74HC30; 74HCT30 8-input NAND gate Rev. 6 — 27 December 2012 Product data sheet 1. General description The 74HC30; 74HCT30 is an 8-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits  Complies with JEDEC standard JESD7A  Input levels:  For 74HC30: CMOS level  For 74HCT30: TTL level  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V  Multiple package options  Specified from 40 C to +85 C and from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74HC30N 40 C to +125 C DIP14 74HCT30N 74HC30D 40 C to +125 C SO14 74HCT30D 74HC30DB 40 C to +125 C SSOP14 74HCT30DB 74HC30PW 40 C to +125 C TSSOP14 74HCT30PW Description plastic dual in-line package; 14 leads (300 mil) Version SOT27-1 plastic small outline package; 14 leads; body width 3.9 mm plastic shrink small outline package; 14 leads; body width 5.3 mm plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT108-1 SOT337-1 SOT402-1 NXP Semiconductors 4. Functional diagram 1A 2B 3C 4D 5E 6F 11 G 12 H Fig 1. Logic symbol Y8 mna488 Fig 3. Logic diagram A B C D E F G H 74HC30; 74HCT30 8-input NAND gate 1& 2 3 4 5 6 11 12 8 mna489 Fig 2. IEC logic symbol Y mna490 74HC_HCT30 Product data sheet All information provided in this document is subject to ...




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