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IDT72T4088 Datasheet PDF


Part Number IDT72T4088
Manufacturer Integrated Device Technology
Title HIGH-SPEED TeraSync DDR/SDR FIFO
Description The IDT72T4088/72T4098/72T40108/72T40118 are exceptionally deep, extremely high speed, CMOS First-In-First-Out (FIFO) memories with the ability to...
Features










• Choose among the following memory organizations: IDT72T4088  16,384 x 40 IDT72T4098  32,768 x 40 IDT72T40108  65,536 x 40 IDT72T40118  131,072 x 40 Up to 250MHz Operation of Clocks - 4ns read/write cycle time, 3.2ns access time Users selectable input port to output port ...

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Datasheet IDT72T4088 PDF File








Similar Ai Datasheet

IDT72T40108 : The IDT72T4088/72T4098/72T40108/72T40118 are exceptionally deep, extremely high speed, CMOS First-In-First-Out (FIFO) memories with the ability to read and write data on both rising and falling edges of clock. The device has a flexible x40/x20/x10 Bus-Matching mode and the option to select single or double data rates for input and output ports. These FIFOs offer several key user benefits: • Flexible x40/x20/x10 Bus-Matching on both read and write ports • Ability to read and write on both rising and falling edges of a clock • User selectable Single or Double Data Rate of input and output ports • A user selectable MARK location for retransmit • User selectable I/O structure for HSTL or LVTTL •.

IDT72T40118 : The IDT72T4088/72T4098/72T40108/72T40118 are exceptionally deep, extremely high speed, CMOS First-In-First-Out (FIFO) memories with the ability to read and write data on both rising and falling edges of clock. The device has a flexible x40/x20/x10 Bus-Matching mode and the option to select single or double data rates for input and output ports. These FIFOs offer several key user benefits: • Flexible x40/x20/x10 Bus-Matching on both read and write ports • Ability to read and write on both rising and falling edges of a clock • User selectable Single or Double Data Rate of input and output ports • A user selectable MARK location for retransmit • User selectable I/O structure for HSTL or LVTTL •.

IDT72T4098 : The IDT72T4088/72T4098/72T40108/72T40118 are exceptionally deep, extremely high speed, CMOS First-In-First-Out (FIFO) memories with the ability to read and write data on both rising and falling edges of clock. The device has a flexible x40/x20/x10 Bus-Matching mode and the option to select single or double data rates for input and output ports. These FIFOs offer several key user benefits: • Flexible x40/x20/x10 Bus-Matching on both read and write ports • Ability to read and write on both rising and falling edges of a clock • User selectable Single or Double Data Rate of input and output ports • A user selectable MARK location for retransmit • User selectable I/O structure for HSTL or LVTTL •.




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