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dsPIC30F


Part Number dsPIC30F
Manufacturer Microchip
Title Family Reference Manual - High-Performance Digital Signal Controllers
Description ..... 2-11 Arithmetic Log...
Features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this ...

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dsPIC30F : dsPIC30F Family Overview dsPIC® High-Performance 16-bit Digital Signal Controller © 2005 Microchip Technology Inc. DS70043F Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specificatio.

DSPIC30F1010 : and general device functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “dsPIC30F/ 33F Programmer’s Reference Manual” (DS70157). High-Performance Modified RISC CPU: • Modified Harvard architecture • C compiler optimized instruction set architecture • 83 base instructions with flexible addressing modes • 24-bit wide instructions, 16-bit wide data path • 12 Kbytes on-chip Flash program space • 512 bytes on-chip data RAM • 16 x 16-bit working register array • Up to 30 MIPS operation: - Dual Internal RC - 9.7 and 14.55 MHz (±1%) Industrial Temp - 6.4 and 9.7 MHz (±1%).

DSPIC30F2010 : and general device functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “dsPIC30F/33F Programmer’s Reference Manual” (DS70157). Peripheral Features: • High current sink/source I/O pins: 25 mA/25 mA • Three 16-bit timers/counters; optionally pair up 16-bit timers into 32-bit timer modules • Four 16-bit capture input functions • Two 16-bit compare/PWM output functions - Dual Compare mode available • 3-wire SPI modules (supports 4 Frame modes) • I2CTM module supports Multi-Master/Slave mode and 7-bit/10-bit addressing • Addressable UART modules with FIFO buffers www.DataSheet4U.com High-Per.

DSPIC30F2011 : and general device functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “16-bit MCU and DSC Programmer’s Reference Manual” (DS70157). High-Performance Modified RISC CPU: • Modified Harvard architecture • C compiler optimized instruction set architecture • Flexible addressing modes • 83 base instructions • 24-bit wide instructions, 16-bit wide data path • Up to 24 Kbytes on-chip Flash program space • Up to 2 Kbytes of on-chip data RAM • Up to 1 Kbytes of nonvolatile data EEPROM • 16 x 16-bit working register array • Up to 30 MIPS operation: - DC to 40 MHz external clock input - 4 MHz - 10 M.

DSPIC30F2012 : and general device functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “16-bit MCU and DSC Programmer’s Reference Manual” (DS70157). High-Performance Modified RISC CPU: • Modified Harvard architecture • C compiler optimized instruction set architecture • Flexible addressing modes • 83 base instructions • 24-bit wide instructions, 16-bit wide data path • Up to 24 Kbytes on-chip Flash program space • Up to 2 Kbytes of on-chip data RAM • Up to 1 Kbytes of nonvolatile data EEPROM • 16 x 16-bit working register array • Up to 30 MIPS operation: - DC to 40 MHz external clock input - 4 MHz - 10 M.

DSPIC30F2020 : and general device functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “dsPIC30F/ 33F Programmer’s Reference Manual” (DS70157). High-Performance Modified RISC CPU: • Modified Harvard architecture • C compiler optimized instruction set architecture • 83 base instructions with flexible addressing modes • 24-bit wide instructions, 16-bit wide data path • 12 Kbytes on-chip Flash program space • 512 bytes on-chip data RAM • 16 x 16-bit working register array • Up to 30 MIPS operation: - Dual Internal RC - 9.7 and 14.55 MHz (±1%) Industrial Temp - 6.4 and 9.7 MHz (±1%).

DSPIC30F2023 : and general device functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “dsPIC30F/ 33F Programmer’s Reference Manual” (DS70157). High-Performance Modified RISC CPU: • Modified Harvard architecture • C compiler optimized instruction set architecture • 83 base instructions with flexible addressing modes • 24-bit wide instructions, 16-bit wide data path • 12 Kbytes on-chip Flash program space • 512 bytes on-chip data RAM • 16 x 16-bit working register array • Up to 30 MIPS operation: - Dual Internal RC - 9.7 and 14.55 MHz (±1%) Industrial Temp - 6.4 and 9.7 MHz (±1%).

DSPIC30F202x : and general device functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “dsPIC30F/ 33F Programmer’s Reference Manual” (DS70157). High-Performance Modified RISC CPU: • Modified Harvard architecture • C compiler optimized instruction set architecture • 83 base instructions with flexible addressing modes • 24-bit wide instructions, 16-bit wide data path • 12 Kbytes on-chip Flash program space • 512 bytes on-chip data RAM • 16 x 16-bit working register array • Up to 30 MIPS operation: - Dual Internal RC - 9.7 and 14.55 MHz (±1%) Industrial Temp - 6.4 and 9.7 MHz (±1%).

DSPIC30F3010 : and general device functionality, refer to the “dsPIC30F Family Reference www.DataSheet4U.com Manual” (DS70046). For more information on the device instruction set and programming, refer to the “dsPIC30F/ 33F Programmer’s Reference Manual” (DS70157). Peripheral Features: • High-current sink/source I/O pins: 25 mA/25 mA • Timer module with programmable prescaler: - Five 16-bit timers/counters; optionally pair 16-bit timers into 32-bit timer modules • 16-bit capture input functions • 16-bit compare/PWM output functions • 3-wire SPI modules (supports 4 Frame modes) • I2CTM module supports Multi-Master/Slave mode and 7-bit/10-bit addressing • 2 UART modules with FIFO Buffers High-Performance .

DSPIC30F3011 : and general device functionality, refer to the “dsPIC30F Family Reference www.DataSheet4U.com Manual” (DS70046). For more information on the device instruction set and programming, refer to the “dsPIC30F/ 33F Programmer’s Reference Manual” (DS70157). Peripheral Features: • High-current sink/source I/O pins: 25 mA/25 mA • Timer module with programmable prescaler: - Five 16-bit timers/counters; optionally pair 16-bit timers into 32-bit timer modules • 16-bit capture input functions • 16-bit compare/PWM output functions • 3-wire SPI modules (supports 4 Frame modes) • I2CTM module supports Multi-Master/Slave mode and 7-bit/10-bit addressing • 2 UART modules with FIFO Buffers High-Performance .

DSPIC30F3012 : and general device functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “16-bit MCU and DSC Programmer’s Reference Manual” (DS70157). High-Performance Modified RISC CPU: • Modified Harvard architecture • C compiler optimized instruction set architecture • Flexible addressing modes • 83 base instructions • 24-bit wide instructions, 16-bit wide data path • Up to 24 Kbytes on-chip Flash program space • Up to 2 Kbytes of on-chip data RAM • Up to 1 Kbytes of nonvolatile data EEPROM • 16 x 16-bit working register array • Up to 30 MIPS operation: - DC to 40 MHz external clock input - 4 MHz - 10 M.

DSPIC30F3013 : and general device functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “16-bit MCU and DSC Programmer’s Reference Manual” (DS70157). High-Performance Modified RISC CPU: • Modified Harvard architecture • C compiler optimized instruction set architecture • Flexible addressing modes • 83 base instructions • 24-bit wide instructions, 16-bit wide data path • Up to 24 Kbytes on-chip Flash program space • Up to 2 Kbytes of on-chip data RAM • Up to 1 Kbytes of nonvolatile data EEPROM • 16 x 16-bit working register array • Up to 30 MIPS operation: - DC to 40 MHz external clock input - 4 MHz - 10 M.

DSPIC30F3014 : and general device functionality, refer to the dsPIC30F Family Reference Manual (DS70046). For more information on the device instruction set and programming, refer to the dsPIC30F Programmer’s Reference Manual (DS70030). Peripheral Features: • High current sink/source I/O pins: 25 mA/25 mA • Up to five 16-bit timers/counters; optionally pair up 16-bit timers into 32-bit timer modules • Up to four 16-bit Capture input functions • Up to four 16-bit Compare/PWM output functions • Data Converter Interface (DCI) supports common audio Codec protocols, including I2S and AC’97 • 3-wire SPI™ module (supports 4 Frame modes) • I2C™ module supports Multi-Master/Slave mode and 7-bit/10-bit addressing .

DSPIC30F4011 : and general device www.DataSheet4U.com functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “dsPIC30F/ 33F Programmer’s Reference Manual” (DS70157). Peripheral Features: • High-current sink/source I/O pins: 25 mA/25 mA • Timer module with programmable prescaler: - Five 16-bit timers/counters; optionally pair 16-bit timers into 32-bit timer modules • 16-bit Capture input functions • 16-bit Compare/PWM output functions • 3-wire SPI modules (supports 4 Frame modes) • I2C™ module supports Multi-Master/Slave mode and 7-bit/10-bit addressing • 2 UART modules with FIFO Buffers • 1 CAN module, 2.0.

DSPIC30F4012 : and general device www.DataSheet4U.com functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “dsPIC30F/ 33F Programmer’s Reference Manual” (DS70157). Peripheral Features: • High-current sink/source I/O pins: 25 mA/25 mA • Timer module with programmable prescaler: - Five 16-bit timers/counters; optionally pair 16-bit timers into 32-bit timer modules • 16-bit Capture input functions • 16-bit Compare/PWM output functions • 3-wire SPI modules (supports 4 Frame modes) • I2C™ module supports Multi-Master/Slave mode and 7-bit/10-bit addressing • 2 UART modules with FIFO Buffers • 1 CAN module, 2.0.

DSPIC30F4013 : and general device functionality, refer to the dsPIC30F Family Reference Manual (DS70046). For more information on the device instruction set and programming, refer to the dsPIC30F Programmer’s Reference Manual (DS70030). Peripheral Features: • High current sink/source I/O pins: 25 mA/25 mA • Up to five 16-bit timers/counters; optionally pair up 16-bit timers into 32-bit timer modules • Up to four 16-bit Capture input functions • Up to four 16-bit Compare/PWM output functions • Data Converter Interface (DCI) supports common audio Codec protocols, including I2S and AC’97 • 3-wire SPI™ module (supports 4 Frame modes) • I2C™ module supports Multi-Master/Slave mode and 7-bit/10-bit addressing .




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