2N7002DCSM

www.DataSheet4U.com 2N7002DCSM MECHANICAL DATA Dimensions in mm (inches) DUAL N–CHANNEL ENHANCEMENT MODE MOS TRANSISTOR 1.40 ± 0.15 (0.055 ± 0.006) 0.64 ± 0.06 (0.025 ± 0.003) 2.29 ± 0.20 (0.09 ± 0.008) 1.65 ± 0.13 (0.065 ± 0.005) 2.54 ± 0.13 (0.10 ± 0.005) 2 1 A 3 4 5 4.32 ± 0.13 (0.170 ± 0.005) FEATURES V(BR)DSS = 60V RDS(ON) = 7.5Ω ID = 0.115A 6 0.23 rad. (0.009) A = 1.27 ± 0.13 (0.05 ± 0.005) 6.22 ± 0.13 (0.245 ± 0.005) CERAMIC LCC2 PACKAGE (underside view) PAD 1 - Drain 1 PAD 2 - Gate 1 PAD 3 - Gate 2 PAD 4 - Drain 2 PAD 5 - Source 2 PAD 6 - Source 1 ABSOLUTE MAXIMUM RATINGS (TCASE = 25°C unless otherwise stated) PER SIDE VDS VGS ID IDM PD Tj Tstg R θJA Drain – Source Voltage Gate – Source Voltage Drain Current Pulsed Drain Current * Power Dissipation Derate Above 25°C Operating Junction Temperature Range Storage Temperature Range Thermal Resistance, Junction to Ambient TOTAL DEVICE 60V ±40V ±0.115A 0.8A 200mW 1.60mW/°C 400mW 2.0mW/°C –55 to 150°C –55 to 150°C 625°C/W 250°C/W * Pulse width limited by maximum junction temperature. Semelab Plc reserves the right to change test conditions, parameter limits and package dimensions without notice. Information furnished by Semelab is believed to be both accurate and reliable at the time of going to press. However Semelab assumes no responsibility for any errors or omissions discovered in its use. Semelab encourages customers to verify that datasheets are current before placing orders. Semelab plc. Tel...