54ACT11353

ą 54ACT11353, 74ACT11353 DUAL 1ĆOFĆ4 DATA SELECTORS/MULTIPLEXERS WITH 3ĆSTATE OUTPUTS SCAS045A − D3109, JUNE 1988 − REVISED APRIL 1993 Inverting Versions of 54ACT11253 and 74ACT11253 Permits Multiplexing From N Lines to 1 Line Performs Parallel-to-Serial Conversion Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process Package Options Include Plastic Small- Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs 1C2 1C3 NC VCC 2C0 54ACT11353 . . . J PACKAGE 74ACT11535 . . . D OR N PACKAGE (TOP VIEW) A B 1Y GND 2Y 1G 2G 2C3 1 2 3 4 5 6 7 8 16 1C0 15 1C1 14 1C2 13 1C3 12 VCC 11 2C0 10 2C1 9 2C2 54ACT11353 . . . FK PACKAGE (TOP VIEW) description Each of these data selectors/multiplexers contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate strobe inputs (G) are provided for each of the two four-line sections. 3 2 1 20 19 1C1 4 18 2C1 1C0 5 17 2C2 NC 6 16 NC A7 15 2C3 B8 14 2G 9 10 11 12 13 1Y GND NC 2Y 1G The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (at a high-impedance state), the low-impedance of the single enabled output will drive the bus line to a high or low logic level. Each output has its own strobe (G). ...