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• Inputs Are TTL-Voltage Compatible • Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin VCC and GND Configur...
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Inputs Are TTL-
Voltage Compatible Flow-Through Architecture Optimizes
PCB Layout
Center-Pin VCC and GND Configuration
Minimizes High-Speed Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
500-mA Typical Latch-Up Immunity
at 125°C
Package Options Include Plastic Small-
Outline Packages, Ceramic Chip Carriers, and Standard Ceramic 300-mil DIPs
description
The ′ACT11470 is an 8-bit registered bus transceiver that contains two sets of D-type flip-flops for temporary storage of data flowing in either direction. Separate clock (CLKAB or CLKBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow.
54ACT11470, 74ACT11470 8ĆBIT REGISTERED BUS TRANSCEIVERS
WITH 3ĆSTATE OUTPUTS
SCAS207 − D4016, APRIL 1993
54ACT11470 . . . JT PACKAGE 74ACT11470 . . . DW PACKAGE
(TOP VIEW)
CEBA A1 A2 A3 A4
GND GND GND GND
A5 A6 A7 A8 CEAB
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 OEBA
27 CLKBA
26 B1
25 B2
24 B3
23 B4 22 VCC 21 VCC 20 B5 19 B6 18 B7 17 B8 16 CLKAB 15 OEAB
54AC11470 . . . FK PACKAGE (TOP VIEW)
B4 VCC VCC B5 B6
GND B3
A4 B2
The A-to-B enable (CEAB) input must be low in order to enter data from A or to output data to B. If both CEAB and CLKAB are low, then the B port presents the level of the A port prior to the most recent low-to-high transition of CLKAB. Data flow from B to A is similar, but requires the use of CEBA, CLKBA, and OEBA inputs.
To avoid false clocking of th...