54ACT16474

54ACT16474, 74ACT16474 18-BIT REGISTERED BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS238A – MAY 1992 – REVISED APRIL 1996 D Members of the Texas Instruments Widebus ™ Family D Inputs Are TTL-Voltage Compatible D 3-State Outputs Drive Bus Lines Directly D Flow-Through Architecture Optimizes PCB Layout D Distributed VCC and GND Pin Configurations Minimize High-Speed Switching Noise D EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process D 500-mA Typical Latch-Up Immunity at 125°C D Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings description The ’ACT16474 are noninverting 18-bit registered bus transceivers composed of two 9-bit sections with separate control signals. For either 9-bit transceiver section, data flow in the A-to-B mode is controlled by output-enable (1OEAB or 2OEAB) and clock (1CLKAB or 2CLKAB) inputs. When 1OEAB or 2OEAB is low, the corresponding outputs are active (high or low) and take on either the current data on low-to-high transition of 1CLKAB or 2CLKAB or the previously stored data if 1CLKAB or 2CLKAB is low. 54ACT16474 . . . WD PACKAGE 74ACT16474 . . . DL PACKAGE (TOP VIEW) 1OEAB 1CLKAB 1A1 GND 1A2 1A3 VCC 1A4 1A5 1A6 GND 1A7 1A8 1A9 2A1 2A2 2A3 GND 2A4 2A5 2A6 VCC 2A7 2A8 GND 2A9 2CLKAB 2OEAB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 1OEBA 55 1CLKBA 54 1...