54F10

Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description These devices contain three independent 3-input NAND gates. They perform the Boolean functions Y = A B C or Y = A + B + C in positive logic. The SN54F10 is characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74F10 is characterized for operation from 0°C to 70°C. FUNCTION TABLE (each gate) INPUTS A B C H H H L X X X L X X X L OUTPUT Y L H H H logic symbol† 1 1A & 2 1B 13 1C 3 2A 4 2B 5 2C 9 3A 10 3B 11 3C 12 1Y 6 2Y 8 3Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. SN54F10, SN74F10 TRIPLE 3-INPUT POSITIVE-NAND GATES SDFS039A – MARCH 1987 – REVISED OCTOBER 1993 SN54F10 . . . J PACKAGE SN74F10 . . . D OR N PACKAGE (TOP VIEW) 1A 1 1B 2 2A 3 2B 4 2C 5 2Y 6 GND 7 14 VCC 13 1C 12 1Y 11 3C 10 3B 9 3A 8 3Y SN54F10 . . . FK PACKAGE (TOP VIEW) 1C VCC NC 1A 1B 2A 3 2 1 20 19 4 18 1Y NC 5 17 NC 2B 6 16 3C NC 7 15 NC 2C 8 14 3B 9 10 11 12 13 3A 3Y NC GND 2Y NC – No internal connection logic diagram, each gate (positive logic) A B Y C PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all...