54LS85

54LS85 DM54LS85 DM74LS85 4-Bit Magnitude Comparators June 1989 54LS85 DM54LS85 DM74LS85 4-Bit Magnitude Comparators General Description These 4-bit magnitude comparators perform comparison of straight binary or BCD codes Three fully-decoded decisions about two 4-bit words (A B) are made and are externally available at three outputs These devices are fully expandable to any number of bits without external gates Words of greater length may be compared by connecting comparators in cascade The A l B A k B and A e B outputs of a stage handling less-significant bits are connected to the corresponding inputs of the next stage handling more-significant bits The stage handling the least-significant bits must have a high-level voltage applied to the A e B input The cascading path is implemented with only a two-gate-level delay to reduce overall comparison times for long words Features Y Y Y Typical power dissipation 52 mW Typical delay (4-bit words) 24 ns Alternate Military Aerospace device (54LS85) is available Contact a National Semiconductor Sales Office Distributor for specifications Connection Diagram Dual-In-Line Package Function Table bs ol TL F 6379 – 1 Comparing Inputs A3 B3 A2 B2 X X A1 B1 X X X X A0 B0 X X X X X X O A3 l B3 A3 k B3 e e e e e e e e e e e e et Cascading Inputs AkB X X X X X X X X L H L X H L Outputs AkB L H L H L H L H L H L L L H AlB X X X X X X X X H L L X H L AeB X X X X X X X X L L H H L L AlB H L H L H L H L H L L L L H A3 A3 A3 A3 A3 A3 A3 ...