55N20E

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTY55N20E/D Designer's TMOS E-FET .™ Power Field Effect Transistor N–Channel Enhancement–Mode Silicon Gate This advanced TMOS power FET is designed to withstand high energy in the avalanche and commutation modes. This new energy efficient design also offers a drain–to–source diode with fast recovery time. Designed for high voltage, high speed switching applications in power supplies, converters, PWM motor controls, and other inductive loads. The avalanche energy capability is specified to eliminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients. Avalanche Energy Specified Diode is Characterized for Use in Bridge Circuits IDSS and VDS(on) Specified at Elevated Temperature D ™ Data Sheet MTY55N20E Motorola Preferred Device TMOS POWER FET 55 AMPERES 200 VOLTS RDS(on) = 0.028 OHM ® G S Symbol VDSS VDGR VGS VGSM ID IDM PD TJ, Tstg EAS RθJC RθJA TL CASE 340G–02, STYLE 1 TO–264 MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Drain–Source Voltage Drain–Gate Voltage (RGS = 1 MΩ) Gate–Source Voltage — Continuous Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms) Drain Current — Continuous @ TC = 25°C Drain Current — Single Pulse (tp ≤ 10 µs) Total Power Dissipation Derate above 25°C Operating and Storage Temperature Range Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C (VDD = 80 Vdc, VGS = 10 Vdc...