56852

56852 Data Sheet Technical Data 56800E 16-bit Digital Signal Controllers DSP56852 Rev. 8 01/2007 freescale.com DSP56852 General Description 120 MIPS at 120MHz 6K x 16-bit Program SRAM 4K x 16-bit Data SRAM 1K x 16-bit Boot ROM 21 External Memory Address lines, 16 data lines and four chip selects One (1) Serial Port Interface (SPI) or one (1) Improved Synchronous Serial Interface (ISSI) One (1) Serial Communication Interface (SCI) Interrupt Controller General Purpose 16-bit Quad Timer JTAG/Enhanced On-Chip Emulation (OnCE™) for unobtrusive, real-time debugging Computer Operating Properly (COP)/Watchdog Timer 81-pin MAPBGA package Up to 11 GPIO Memory Program Memory 6144 x 16 SRAM Boot ROM 1024 x 16 ROM Data Memory 4096 x 16 SRAM 6 JTAG/ Enhanced OnCE VDDIO 6 VDD 3 VSSIO 6 VSS VDDA 3 VSSA 16-Bit 56800E Core Program Controller and Hardware Looping Unit Address Generation Unit Data ALU 16 x 16 + 36 → 36-Bit MAC Three 16-...