56F8123

56F8323/56F8123 Data Sheet Preliminary Technical Data www.DataSheet4U.com 56F8300 16-bit Digital Signal Controllers MC56F8323 Rev. 17 04/2007 freescale.com Document Revision History Version History Rev 1.0 Rev 2.0 Rev 3.0 Description of Change Pre-Release version, Alpha customers only Initial Public Release Corrected typo in Table 10-4, Flash Endurance is 10,000 cycles. Addressed additional grammar issues. Added Package Pins to GPIO Table in Section 8. Removed reference to pin group 9 in Table 10-5. Replacing TBD Typical Min with values in Table 10-17. Editing grammar, spelling, consistency of language throughout family. Updated values in Regulator Parameters, Table 10-9, External Clock Operation Timing Requirements Table 10-13, SPI Timing, Table 10-18, ADC Parameters, Table 10-24, and IO Loading Coefficients at 10MHz, Table 10-25. Updated values in Power-On Reset Low Voltage, Table 10-6. Correcting package pin numbers in Table 2-2, PhaseA0 changed from 38 to 52, PhaseB0 changed from 37 to 51, Index0 changed from 36 to 50, and Home0 changed from 35 to 49. All pin changes in Table 2-2 were do to data entry errors - This package pin-out has not changed Added Part 4.8, added addition text to Part 6.9 on POR reset, added the word “access” to FM Error Interrupt in Table 4-3, removed min and max numbers; only documenting Typ. numbers for LVI in Table 10-6. Updated numbers in Table 10-7 and Table 10-8 with more recent data. Corrected typo in Table 10-3 in Pd characteristics. Re...