7493

DM7490A, DM7493A Decade and Binary Counters March 1998 DM7490A, DM7493A Decade and Binary Counters General Description Each of these monolithic counters contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the 90A and divide-by-eight for the 93A. All of these counters have a gated zero reset and the 90A also has gated set-to-nine inputs for use in BCD nine’s complement applications. To use their maximum count length (decade or four-bit binary), the B input is connected to the QA output. The input count pulses are applied to input A and the outputs are as described in the appropriate truth table. A symmetrical divide-by-ten count can be obtained from the 90A counters by connecting the QD output to the A input and applying the input count to the B input which gives a divide-by-ten square wave at output QA. Features n Typical power dissipation — 90A 145 mW — 93A 130 mW n Count frequency 42 MHz Connection Diagrams Dual-In-Line Package Dual-In-Line Package DS006533-1 Order Number DM5490J, DM5490W or DM7490AN See Package Number J14A, N14A or W14B DS006533-2 Order Number DM7493AN See Package Number N14A © 1998 Fairchild Semiconductor Corporation DS006533 www.fairchildsemi.com Absolute Maximum Ratings (Note 1) Supply Voltage Input Voltage Operating Free Air Temperature Range 7V 5.5V DM54 DM74 Storage Temperature Range −55˚C to +125˚C 0˚C to...