74ACT08
QUAD 2-INPUT AND GATE
s HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 2µA(MAX.) ...
74ACT08
QUAD 2-INPUT AND GATE
s HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 2µA(MAX.) at TA=25°C
s COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.), VIL = 0.8V (MAX.)
)s 50Ω TRANSMISSION LINE DRIVING t(sCAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
uc|IOH| = IOL = 24mA (MIN) ds BALANCED PROPAGATION DELAYS: ro )tPLH ≅ tPHL P t(ss OPERATING
VOLTAGE RANGE: te cVCC (OPR) = 4.5V to 5.5V le us PIN AND FUNCTION COMPATIBLE WITH d74 SERIES 08 so ros IMPROVED LATCH-UP IMMUNITY b PDESCRIPTION - O teThe 74ACT08 is an advanced high-speed
CMOS ) leQUAD 2-INPUT AND GATE fabricated with t(s osub-micron silicon gate and double-layer metal swiring C2MOS tecnology. c bThe internal circuit is composed of 2 stages u Oincluding buffer output, which enables high noise rod -immunity and stable output.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP SOP TSSOP
TUBE
74ACT08B 74ACT08M
T&R
74ACT08MTR 74ACT08TTR
The device is designed to interface directly High Speed
CMOS systems with TTL, NMOS and
CMOS output
voltage levels. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess
voltage.
OObbssoolleettee PProduct(s)PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2001
1/8
74ACT08
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1, 4, 9, 12 2, 5, 10, 13 3, 6, 8, 11
7 14
SYMBOL
1A to 4A 1B to 4B 1Y to 4Y
GND VCC
NAME AND FUNCTION
Data Inputs Data Inputs Data Outputs Ground (0V) Positive S...