74AHC139-Q100; 74AHCT139-Q100
Dual 2-to-4 line decoder/demultiplexer
Rev. 1 — 5 June 2013
Product data sheet
1. General description
The 74AHC139-Q100; 74AHCT139-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A.
The 74AHC139-Q100; 74AHCT139-Q100 is a ...