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74ALVC14 Datasheet

Part Number 74ALVC14
Manufacturers nexperia
Logo nexperia
Description Hex inverting Schmitt trigger
Datasheet 74ALVC14 Datasheet74ALVC14 Datasheet (PDF)

74ALVC14 Hex inverting Schmitt trigger Rev. 5 — 30 April 2021 Product data sheet 1. General description The 74ALVC14 is a hex inverter with Schmitt-trigger inputs. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low p.

  74ALVC14   74ALVC14






Part Number 74ALVC16841
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description Low Voltage 20-Bit Transparent Latch
Datasheet 74ALVC14 Datasheet74ALVC16841 Datasheet (PDF)

74ALVC16841 Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs November 2001 Revised November 2001 74ALVC16841 Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs General Description The ALVC16841 contains twenty non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch enable (LE) is HIGH. When LE is LOW, the data that meets.

  74ALVC14   74ALVC14







Part Number 74ALVC16839
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description Low Voltage 20-Bit Selectable Register/Buffer
Datasheet 74ALVC14 Datasheet74ALVC16839 Datasheet (PDF)

74ALVC16839 Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs December 2001 Revised December 2001 74ALVC16839 Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs General Description The ALVC16839 contains twenty non-inverting selectable buffered or registered paths. The device can be configured to operate in a registered, or flow through buffer mode by utilizing the register enable (REGE) and Clock (CLK) signals. The device oper.

  74ALVC14   74ALVC14







Part Number 74ALVC16836ADGG
Manufacturers nexperia
Logo nexperia
Description 20-bit registered driver
Datasheet 74ALVC14 Datasheet74ALVC16836ADGG Datasheet (PDF)

74ALVC16836A 20-bit registered driver with inverted register enable; 3-state Rev. 2 — 12 September 2018 Product data sheet 1. General description The 74ALVC16836A is a 20-bit universal bus driver. Data flow is controlled by active low output enable (OE), active low latch enable (LE) and clock inputs (CP). When LE is LOW, the A to Y data flow is transparent. When LE is HIGH and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-data is stored in the latch.

  74ALVC14   74ALVC14







Part Number 74ALVC16836A
Manufacturers nexperia
Logo nexperia
Description 20-bit registered driver
Datasheet 74ALVC14 Datasheet74ALVC16836A Datasheet (PDF)

74ALVC16836A 20-bit registered driver with inverted register enable; 3-state Rev. 2 — 12 September 2018 Product data sheet 1. General description The 74ALVC16836A is a 20-bit universal bus driver. Data flow is controlled by active low output enable (OE), active low latch enable (LE) and clock inputs (CP). When LE is LOW, the A to Y data flow is transparent. When LE is HIGH and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-data is stored in the latch.

  74ALVC14   74ALVC14







Part Number 74ALVC16836A
Manufacturers NXP
Logo NXP
Description 20-bit registered driver
Datasheet 74ALVC14 Datasheet74ALVC16836A Datasheet (PDF)

INTEGRATED CIRCUITS 74ALVC16836A 20-bit registered driver with inverted register enable (3-State) Product specification Replaces datasheet 74ALVC16836 of 2000 Jan 04 IC24 Data Handbook 2000 Mar 14 Philips Semiconductors Philips Semiconductors Product specification 20-bit registered driver with inverted register enable (3-State) 74ALVC16836A FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct interface with .

  74ALVC14   74ALVC14







Hex inverting Schmitt trigger

74ALVC14 Hex inverting Schmitt trigger Rev. 5 — 30 April 2021 Product data sheet 1. General description The 74ALVC14 is a hex inverter with Schmitt-trigger inputs. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power consumption • Direct interface with TTL levels (2.7 V to 3.6 V) • Power-down mode • Unlimited input rise and fall times • Latch-up performance exceeds 250 mA • Complies with JEDEC standard: • JESD8-7 (1.65 V to 1.95 V) • JESD8-5 (2.3 V to 2.7 V) • JESD8-B (2.7 V to 3.6 V) • ESD protection: • HBM EIA/JESD22-A114-B exceeds 2000 V • MM EIA/JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40 °C to +85 °C Nexperia 74ALVC14 Hex inverting Schmitt trigger 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description 74ALVC14D -40 °C to +85 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm 74ALVC14PW -40 °C to +85 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm 74ALVC14BQ -40 °C to +85 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm Version SOT108-1 SOT402-1 SOT762-1 .


2019-07-25 : 74LVC1G16    74LVC1G34    74LVC1G126    74LVC1GU04    74ABT16245B    74ALVC164245    74AUP1T34    74AUP1T17    PH9496NL    74ABT16244A   


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