DatasheetsPDF.com

74ALVCH162827 Datasheet

Part Number 74ALVCH162827
Manufacturers NXP
Logo NXP
Description 20-bit buffer/line driver
Datasheet 74ALVCH162827 Datasheet74ALVCH162827 Datasheet (PDF)

INTEGRATED CIRCUITS 74ALVCH162827 20-bit buffer/line driver, non-inverting, with 30W termination resistors (3-State) Product specification IC24 Data Handbook 1998 Sep 29 Philips Semiconductors Philips Semiconductors Product specification 20-bit buffer/line driver, non-inverting, with 30Ω termination resistors (3-State) 74ALVCH162827 FEATURES • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct interface with TTL levels • Current drive ± 12 mA at 3.0 V • MULTIBYT.

  74ALVCH162827   74ALVCH162827






Part Number 74ALVCH162827
Manufacturers nexperia
Logo nexperia
Description 20-bit buffer/line driver
Datasheet 74ALVCH162827 Datasheet74ALVCH162827 Datasheet (PDF)

74ALVCH162827 20-bit buffer/line driver; non-inverting; with 30 Ω termination resistors; 3-state Rev. 2 — 19 January 2018 Product data sheet 1 General description The 74ALVCH162827 20-bit buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NAND output enables (nOE1 and nOE2) for maximum control flexibility. The 74ALVCH162827 is designed with 30 Ω series resisters in both the pull-up and pulldown output structures. This de.

  74ALVCH162827   74ALVCH162827







20-bit buffer/line driver

INTEGRATED CIRCUITS 74ALVCH162827 20-bit buffer/line driver, non-inverting, with 30W termination resistors (3-State) Product specification IC24 Data Handbook 1998 Sep 29 Philips Semiconductors Philips Semiconductors Product specification 20-bit buffer/line driver, non-inverting, with 30Ω termination resistors (3-State) 74ALVCH162827 FEATURES • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct interface with TTL levels • Current drive ± 12 mA at 3.0 V • MULTIBYTETM flow-through standard pin-out architecture • Low inductance multiple VCC and GND pins for minimum noise and ground bounce DESCRIPTION The 74ALVCH162827 high-performance CMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ALVCH162827 20-bit buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NAND Output Enables (nOE1, nOE2) for maximum control flexibility. The 74ALVCH162827 is designed with 30Ω series resistance in both the pull-up and pull-down output structures. This design reduces line noise in applications such as memory address drivers, clock drivers and bus receivers/transmitters. To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. Active bus-hold circuitry is provided to hold .


2005-04-03 : STK4110    STK4111    STK4112    4511    4511B    FQ08E    2SC4491    2SC4492    2SC4493    2SC4495   


@ 2014 :: Datasheetspdf.com ::
Semiconductors datasheet search & download site (Privacy Policy & Contact)