Home > 74AUP1G32 Datasheet pdf > Low-power 2-input OR gate

(PDF) 74AUP1G32 Datasheet download


Manufacture Part Number Description PDF

NXP
74AUP1G32 Low-power 2-input OR gate
74AUP1G32 Low-power 2-input OR gate Rev. 01 — 2 August 2005 Product data sheet 1. General description The 74AUP1G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger
74AUP1G32

Diodes
74AUP1G32 SINGLE 2 INPUT POSITIVE OR GATE
74AUP1G32 SINGLE 2 INPUT POSITIVE OR GATE Description The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP1G32 is a single, two-input, positive OR gate with a standard push-pull output design
74AUP1G32

NXP
74AUP1G3208 Low Power 3-Input OR-AND Gate
74AUP1G3208 Low-power 3-input OR-AND gate Rev. 01 — 29 November 2006 Product data sheet 1. General description The 74AUP1G3208 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmi
74AUP1G32




Alternate Search Terms
74AUP1G32 datasheet 74AUP1G32 component 74AUP1G32 integrated circuit 74AUP1G32 schematic 74AUP1G32 application note 4AUP1G32 AUP1G32 UP1G32 74AUP1G3 74AUP1G 74AUP1

@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)