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74AUP1G374-Q100

nexperia

Low-power D-type flip-flop

74AUP1G374-Q100 Low-power D-type flip-flop; positive-edge trigger; 3-state Rev. 3 — 21 January 2022 Product data shee...


nexperia

74AUP1G374-Q100

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Description
74AUP1G374-Q100 Low-power D-type flip-flop; positive-edge trigger; 3-state Rev. 3 — 21 January 2022 Product data sheet 1. General description The 74AUP1G374-Q100 is a single D-type flip-flop; positive-edge trigger (3-state). Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 0.8 V to 3.6 V High noise immunity CMOS low power dissipation Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 Class 3A. Exceeds 5000 V HBM JESD22-A114F Class 3A. Exceeds 5000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) Low static power consumption; ICC = 0.9 μA (maximum) Latch-up performance exceeds ...




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