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74F175 Flip-Flop Datasheet PDF

Quad D Flip-Flop

Quad D Flip-Flop

 

 

 

Part Number 74F175
Description Quad D Flip-Flop
Feature 54F 74F175 Quad D Flip-Flop November 19 94 54F 74F175 Quad D Flip-Flop General Description The ’F175 is a high-spee d quad D flip-flop The device is useful for general flip-flop requirements whe re clock and clear inputs are common Th e information on the D inputs is stored during the LOW-to-HIGH clock transitio n Both true and complemented outputs of each flip-flop are provided A Master R eset input resets all flip-flops indepe ndent of the Clock or D inputs LOW Fea tures Y Y Y Y Y Edge-triggered D-type inputs Buffered positive edge-triggered clock Asynchronous common reset True a nd complement ou .
Manufacture National Semiconductor
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74F175

 

 

 


 

 

 

Part Number 74F175
Description Quad D-Type Flip-Flop
Feature D Contains Four Flip-Flops With Double-R ail Outputs D Buffered Clock and Direct Clear Inputs D Applications Include: Buffer/Storage Registers – Shift R egisters – Pattern Generators descrip tion This positive-edge-triggered flip- flop utilizes TTL circuitry to implemen t D-type flip-flop logic with a direct clear (CLR) input.
Information at the d ata (D) inputs meeting setup-time requi rements is transferred to outputs on th e positive-going edge of the clock puls e.
Clock triggering occurs at a particu lar voltage level and is not directly r elated to the transition time of the po sitive-going pulse.
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Manufacture Texas Instruments
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74F175

 

 

 


 

 

 

Part Number 74F175
Description Quad D-Type Flip-Flop
Feature 74F175 Quad D-Type Flip-Flop April 1988 Revised July 1999 74F175 Quad D-Type Flip-Flop General Description The 74F17 5 is a high-speed quad D-type flip-flop .
The device is useful for general flip -flop requirements where clock and clea r inputs are common.
The information on the D inputs is stored during the LOW- to-HIGH clock transition.
Both true and complemented outputs of each flip-flop are provided.
A Master Reset input res ets all flip-flops, independent of the Clock or D inputs, LOW.
Features s Edg e-triggered D-type inputs s Buffered po sitive edge-triggered clock s Asynchron ous common res .
Manufacture Fairchild Semiconductor
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74F175

 

 

 

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