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74HC2G32

nexperia

Dual 2-input OR gate

74HC2G32; 74HCT2G32 Dual 2-input OR gate Rev. 6 — 8 February 2019 Product data sheet 1. General description The 74HC2...


nexperia

74HC2G32

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Description
74HC2G32; 74HCT2G32 Dual 2-input OR gate Rev. 6 — 8 February 2019 Product data sheet 1. General description The 74HC2G32; 74HCT2G32 is a dual 2-input OR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V Input levels: For 74HC2G32: CMOS level For 74HCT2G32: TTL level Complies with JEDEC standard no. 7A Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from -40 °C to +85 °C and -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74HC2G32DP -40 °C to +125 °C 74HCT2G32DP 74HC2G32DC -40 °C to +125 °C 74HCT2G32DC Name TSSOP8 VSSOP8 Description Version plastic thin shrink small outline package; 8 leads; SOT505-2 body width 3 mm; lead length 0.5 mm plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 4. Marking Table 2. Marking code Type number 74HC2G32DP 74HCT2G32DP 74HC2G32DC 74HCT2G32DC Marking code [1] H32 T32 H32 T32 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. Nexperia 5. Functional diagram 1 1A 2 1B 5 2A 6 2B 1Y 7 2Y 3 mna733 Fig. 1. Logic symbol 1 ≥1 7 2 5 ≥1 3 6 mna734 Fig. 2. IEC logic sy...




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