M54HC386 M74HC386
QUAD EXCLUSIVE OR GATE
HIGH SPEED tPD = 10 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C www.DataSheet4U.com HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS386 DESCRIPTION The M54/74HC386 is a high speed CMOS QUAD EXCLUSIV.
QUAD EXCLUSIVE OR GATE
M54HC386 M74HC386
QUAD EXCLUSIVE OR GATE
HIGH SPEED tPD = 10 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C www.DataSheet4U.com HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS386 DESCRIPTION The M54/74HC386 is a high speed CMOS QUAD EXCLUSIVE-OR GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. An output buffer provides high noise immunity and a stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTIONS (top view)
. . . . . . . .
B1R (Plastic Package)
F1R (Ceramic Package)
M1R (Micro Package)
C1R (Chip Carrier)
ORDER CODES : M54HC386F1R M74HC386M1R M74HC386B1R M74HC386C1R
INPUT AND OUTPUT EQUIVALENT CIRCUIT
NC = No Internal Connection
February 1993
1/9
M54/M74HC386
TRUTH TABLE
A L L H H B L H L H Y L H H L
IEC LOGIC SYMBOL
PIN DESCRIPTION
PIN No www.DataSheet4U.com 1, 2, 5, 6, 8, 9, 12, 13 3, 4, 10, 11 7 14 SYMBOL 1A, 1B, 2A, 2B, 3A, 3B, 4A, 4B 1Y to 4Y GND VCC NAME AND FUNCTION Data Inputs
Data Outputs Ground (0V) Positive Supply Voltage
SCHEMATIC CIRCUIT (Per Gate)
ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VO IIK IOK IO ICC or IGND PD Tstg.