M54/74HC690/691 M54/74HC692/693
HC690/692 DECADE COUNTER/REGISTER (3-STATE) HC691/693 4 BIT BINARY COUNTER/REGISTER (3-S...
M54/74HC690/691 M54/74HC692/693
HC690/692 DECADE COUNTER/REGISTER (3-STATE) HC691/693 4 BIT BINARY COUNTER/REGISTER (3-STATE)
HIGH SPEED fMAX = 50 MHz (TYP.) at VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA = 25 °C www.DataSheet4U.com HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS (for QA to QD) 10 LSTTL LOADS (for RCO) SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 6 mA (MIN.) (for QA to QD) IOH = IOL = 4 mA (MIN.) (for RCO) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING
VOLTAGE RANGE VCC (OPR) = 2 V to 6 V PIN AND FUNCTION COMPATIBLE WITH LSTTL 54/74LS690/691 DESCRIPTION The HC690/691/692/693 are high speed
CMOS COUNTER/REGISTER fabricated in silicon gate C2MOS technology. They have the same high speed performance of LSTTL combined with true
CMOS low power consumption. The internal circuit is composed of 3 stages including buffer output, which offers high noise immunity and stable output. These devices incorporate a synchronous counter, four-bit D-type register, and quadruple two-line to one-line multiplexers with three-state outputs in a single 20-pin package. The counter can be programmed from the data inputs and have enable P and enable T inputs and a ripplecarry output for easy expansion. The register/counter select input, R/C, selects the counter when low or the register when high for the threestate outputs, QA, QB, QC, and QD. If the LOAD input (LOAD) is held ”L” DATA input (AD) are loaded in to the internal co...