DatasheetsPDF.com

74LS107

Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops

Description

DM54LS107A DM74LS107A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs June 1989 DM54LS107A DM74LS107A Dual Negative-EdgeTriggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary ou...

ETC

Download 74LS107 Datasheet

Similar Datasheet

74LS109A Dual J-K Positive-Edge-Triggered Flip-Flops - Texas Instruments
74LS109A LOW POWER SCHOTTKY - ON Semiconductor
74LS109 Dual J-K Flip-Flop - Agere Systems
74LS10 Triple 3-Input NAND Gate - Fairchild Semiconductor

@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)