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74LS373 FLIP-FLOP Datasheet PDF

OCTAL D-TYPE FLIP-FLOP

OCTAL D-TYPE FLIP-FLOP

　

　

　

Part Number 74LS373
Description OCTAL D-TYPE FLIP-FLOP
Feature OCTAL TRANSPARENT LATCH WITH 3-STATE OUT PUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STA TE OUTPUT The SN54 / 74LS373 consists o f eight latches with 3-state outputs fo r bus organized system applications.
Th e flip-flops appear transparent to the data (data changes asynchronously) when Latch Enable (LE) is HIGH.
When LE is LOW, the data that meets the setup time s is latched.
Data appears on the bus w hen the Output Enable (OE) is LOW.
When OE is HIGH the bus output is in the hi gh impedance state.
The SN54 / 74LS374 is a high-speed, low-power Octal D-type Flip-Flop featuring separate D-type in puts for each .
Manufacture Motorola
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74LS373

　

　

　

　

　

　

Part Number 74LS373
Description TRI-STATEE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops
Feature DM54LS373 DM74LS373 DM54LS374 DM74LS374 TRI-STATE Octal D-Type Transparent Latc hes and Edge-Triggered Flip-Flops May 1992 DM54LS373 DM74LS373 DM54LS374 DM7 4LS374 TRI-STATE Octal D-Type Transpare nt Latches and Edge-Triggered Flip-Flop s General Description These 8-bit regis ters feature totem-pole TRI-STATE outpu ts designed specifically for driving hi ghly-capacitive or relatively low-imped ance loads The high-impedance state and increased high-logic level drive provi de these registers with the capability of being connected directly to and driv ing the bus lines in a bus-organized sy stem without n .
Manufacture National Semiconductor
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74LS373

　

　

　

　

　

　

Part Number 74LS373
Description Octal D-type Transparent Latches
Feature Unit: mm 24.
50 25.
40 Max 20 11 7.
00 Max 6.
30 1 0.
89 1.
27 Max 10 1.
30 2.
54 Min 5.
08 Max 7.
62 0.
51 Min 2.
54 ± 0.
25 0.
48 ± 0.
10 0.
25 – 0.
05 0° – 15 ° + 0.
11 Hitachi Code JEDEC EIAJ Wei ght (reference value) DP-20N — Confo rms 1.
26 g Unit: mm 12.
6 13 Max 20 11 1 10 5.
5 0.
80 Max 2.
20 Max *0.
22 ± 0.
05 0.
20 ± 0.
04 0.
20 7.
80 + – 0.
30 1.
15 1.
27 *0.
42 ± 0.
08 0.
40 ± 0.
06 0.
10 ± 0.
10 0° – 8° 0.
70 ± 0.
20 0.
15 0.
12 M *Dimension includin g the plating thickness Base material d imension Hitachi Code JEDEC EIAJ Weigh t (reference value) FP-20DA — Confor ms 0.
31 g Unit: mm 12.
8 13.
2 Max 20 1 .
Manufacture Hitachi Semiconductor
Datasheet
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74LS373

　

　

　

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