74LV7032A
Quad 2-input OR gate with Schmitt trigger inputs
Rev. 2 — 16 May 2023
Product data sheet
1. General descri...
74LV7032A
Quad 2-input OR gate with Schmitt trigger inputs
Rev. 2 — 16 May 2023
Product data sheet
1. General description
The 74LV7032A is a quad 2-input OR function with Schmitt-trigger inputs, capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
Inputs are over
voltage tolerant. This feature allows the use of these devices as translators in mixed
voltage environments.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
2. Features and benefits
Wide supply
voltage range from 2.0 V to 5.5 V Maximum tpd of 9.5 ns at 5 V Typical VOL(p) < 0.8 V at VCC = 3.3 V, Tamb = 25 °C Typical VOH(v) > 2.3 V at VCC = 3.3 V, Tamb = 25 °C Supports mixed-mode
voltage operation on all ports IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 250 mA per JESD 78 Class II ESD protection:
MM: MM JESD22-A115-B exceeds 200 V HBM: ANSI/ESDA/JEDEC JS-001 Class 3A exceeds 4 kV CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 2 kV Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information Type number Package
Temperature range 74LV7032APW -40 °C to +125 °C
Name TSSOP14
Description
plastic thin shrink small outline package; 14 leads; body width 4.4 mm
Version SOT402-1
Nexperia
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