74LVC1G58
Low-power configurable multiple function gate
Rev. 01 — 15 September 2004 Product data sheet
1. General descri...
74LVC1G58
Low-power configurable multiple function gate
Rev. 01 — 15 September 2004 Product data sheet
1. General description
The 74LVC1G58 is a high-performance, low-power, low-
voltage, Si-gate
CMOS device, superior to most advanced
CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC1G58 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XOR, inverter and buffer. All inputs can be connected to VCC or GND. The three inputs (A, B and C) are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The gate switches at different points for positive and negative-going signals. The difference between the positive
voltage VT+ and the negative
voltage VT− is defined as the hysteresis
voltage VH.
2. Features
s s s s Wide supply
voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8B/JESD36 (2.7 V to 3.6 V). ±24 mA output drive (VCC = 3.0 V) ESD protection: x...