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74LVC2G38 gate Datasheet PDFDual 2-input NAND gate Dual 2-input NAND gate |
| Part Number | 74LVC2G38 |
|---|---|
| Description | Dual 2-input NAND gate |
| Feature | 74LVC2G38
Dual 2-input NAND gate; open drain
Rev. 11 — 8 April 2013 Product data sheet 1. General description The 74LVC2G38 provides a 2-input NAND function. The outputs of the 74LVC2G38 devices are open-drain and can be connected to other open-drain outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. Inputs can be driven from either 3. 3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3. 3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the outpu. |
| Manufacture | NXP |
| Datasheet |
| Part Number | 74LVC2G38 |
|---|---|
| Description | Dual 2-input NAND gate |
| Feature | 74LVC2G38
Dual 2-input NAND gate; open drain
Rev. 11 — 8 April 2013 Product data sheet 1. General description The 74LVC2G38 provides a 2-input NAND function. The outputs of the 74LVC2G38 devices are open-drain and can be connected to other open-drain outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. Inputs can be driven from either 3. 3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3. 3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the outpu. |
| Manufacture | NXP |
| Datasheet |
| Part Number | 74LVC2G38 |
|---|---|
| Description | DUAL 2-INPUT NAND GATE |
| Feature | NEW PRODUCT
74LVC2G38
DUAL 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUTS
Description
Pin Assignments
The 74LVC2G38 is a dual, two input NAND gate with open-drain outputs. Both gates have open-drain outputs designed for operation over a power supply range of 1. 65V to 5. 5V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down. Each gate performs the positive Boolean function Y A B or Y A B (Top View) 1A 1 8 VCC 1B 2 7 1Y 2Y 3 6 2B It is understood . |
| Manufacture | Diodes |
| Datasheet |
| Part Number | 74LVC2G38 |
|---|---|
| Description | DUAL 2-INPUT NAND GATE |
| Feature | NEW PRODUCT
74LVC2G38
DUAL 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUTS
Description
Pin Assignments
The 74LVC2G38 is a dual, two input NAND gate with open-drain outputs. Both gates have open-drain outputs designed for operation over a power supply range of 1. 65V to 5. 5V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down. Each gate performs the positive Boolean function Y A B or Y A B (Top View) 1A 1 8 VCC 1B 2 7 1Y 2Y 3 6 2B It is understood . |
| Manufacture | Diodes |
| Datasheet |
| Part Number | 74LVC2G38 |
|---|---|
| Description | Dual 2-input NAND gate |
| Feature | 74LVC2G38
Dual 2-input NAND gate; open drain
Rev. 13 — 3 July 2017 Product data sheet 1 General description The 74LVC2G38 provides a 2-input NAND function. The outputs of the 74LVC2G38 devices are open-drain and can be connected to other open-drain outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. Inputs can be driven from either 3. 3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3. 3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output,. |
| Manufacture | nexperia |
| Datasheet |
| Part Number | 74LVC2G38 |
|---|---|
| Description | Dual 2-input NAND gate |
| Feature | 74LVC2G38
Dual 2-input NAND gate; open drain
Rev. 13 — 3 July 2017 Product data sheet 1 General description The 74LVC2G38 provides a 2-input NAND function. The outputs of the 74LVC2G38 devices are open-drain and can be connected to other open-drain outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. Inputs can be driven from either 3. 3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3. 3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output,. |
| Manufacture | nexperia |
| Datasheet |
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