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74LVCH1T45 Datasheet

Part Number 74LVCH1T45
Manufacturers nexperia
Logo nexperia
Description Dual supply translating transceiver
Datasheet 74LVCH1T45 Datasheet74LVCH1T45 Datasheet (PDF)

74LVC1T45; 74LVCH1T45 Dual supply translating transceiver; 3-state Rev. 9 — 10 February 2022 Product data sheet 1. General description The 74LVC1T45; 74LVCH1T45 are single bit, dual supply transceivers with 3-state outputs that enable bidirectional level translation. They feature two 1-bit input-output ports (A and B), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 1.2 V and 5.5 V making the device suita.

  74LVCH1T45   74LVCH1T45






Part Number 74LVCH1T45
Manufacturers NXP
Logo NXP
Description Dual Supply Translating Transceiver
Datasheet 74LVCH1T45 Datasheet74LVCH1T45 Datasheet (PDF)

www.DataSheet4U.com 74LVC1T45; 74LVCH1T45 Dual supply translating transceiver; 3-state Rev. 01 — 11 May 2009 Product data sheet 1. General description The 74LVC1T45; 74LVCH1T45 are single bit, dual supply transceivers with 3-state outputs that enables bidirectional level translation. They feature one data input-output port (A and B), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 1.2 V and 5.5 V making the.

  74LVCH1T45   74LVCH1T45







Dual supply translating transceiver

74LVC1T45; 74LVCH1T45 Dual supply translating transceiver; 3-state Rev. 9 — 10 February 2022 Product data sheet 1. General description The 74LVC1T45; 74LVCH1T45 are single bit, dual supply transceivers with 3-state outputs that enable bidirectional level translation. They feature two 1-bit input-output ports (A and B), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 1.2 V and 5.5 V making the device suitable for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins A and DIR are referenced to VCC(A) and pin B is referenced to VCC(B). A HIGH on DIR allows transmission from A to B and a LOW on DIR allows transmission from B to A. The devices are fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A port and B port are in the high-impedance OFF-state. Active bus hold circuitry in the 74LVCH1T45 holds unused or floating data inputs at a valid logic level. 2. Features and benefits • Wide supply voltage range: • VCC(A): 1.2 V to 5.5 V • VCC(B): 1.2 V to 5.5 V • High noise immunity • Maximum data rates: • 420 Mbps (3.3 V to 5.0 V translation) • 210 Mbps (translate to 3.3 V)) • 140 Mbps (translate to 2.5 V) • 75 Mbps (translate to 1.8 V) • 60 Mbp.


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