82443LX

E T T INTEL 440LX AGPSET: 82443LX PCI A.G.P. CONTROLLER (PAC) T Accelerated Graphics Port (A.G.P.) Interface  A.G.P. Specification Compliant  A.G.P. 66/133 MHz 3.3V Devices Supported  Synchronous Coupling to the Host Bus Frequency PCI Bus Interface  PCI Revision 2.1 Interface Compliant  Greater Than 100-MBps Data Streaming for PCI-to-DRAM Accesses  Integrated Arbiter With MultiTransaction PCI Arbitration Acceleration Hooks  Five PCI Bus Masters are Supported in Addition to the Host and PCI-toISA I/O Bridge  Delayed Transaction Support  PCI Parity Checking and Generation Support Data Buffering For Increased Performance  Extensive CPU-to-DRAM, PCI-toDRAM, and A.G.P.-to-DRAM Write Data Buffering  CPU-to-A.G.P., PCI-to-A.G.P., and A.G.P.-to-PCI Data Buffering  Write Combining Support for CPU-to-PCI Burst Writes  Supports Concurrent Host, PCI, and A.G.P. Transactions to Main Memory System Management Mode (SMM) Compliant 492 Pin BGA Package Supports the Pentium® II Processor at a Bus Frequency of 66 MHz  Supports 32-Bit Addressing  Optimized In-Order and Request Queue  Full Symmetric Multi-Processor (SMP) Protocol for Up to Two Processors  Dynamic Deferred Transaction Support  GTL+ Compliant Host Bus Supports WC Cycles Integrated DRAM Controller  EDO (Extended Data Out), and Synchronous DRAM Support  Supports a Maximum Memory Size of 512 MB With SDRAM, or 1 GB With EDO  64/72-bit Path to Memory  Configurable DRAM Interface  Support for Auto Detection of Mem...