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Technical Data MPC8250EC/D Rev. 0.9 8/2003 MPC8250 Hardware Specifications www.DataSheet4U.com This document contains detailed information on power considerations, DC/AC electrical characteristics, and AC timing specifications for the MPC8250 PowerQUICC II™ communications processor. The following topics are addressed: Topic Section 1.1, “Features” Section 1.2, “Electrical and Thermal Characteristics” Section 1.2.1, “DC Electrical Characteristics” Section 1.2.2, “Thermal Characteristics” Section 1.2.3, “Power Considerations” Section 1.2.4, “AC Electrical Characteristics” Section 1.3, “Clock Configuration Modes” Section 1.3.1, “Local Bus Mode” Section 1.3.2, “PCI Mode” Section 1.4, “Pinout” Section 1.5, “Package Description” Section 1.6, “Ordering Information” Page 2 5 5 10 10 11 19 19 22 28 53 56 The MPC8250 is available in two packages—the standard ZU package (480 TBGA) and an alternate VR package (516 PBGA)—as described in Section 1.4, “Pinout,” and Section 1.5, “Package Description.” For more information on VR packages, contact your Motorola sales office. Note that throughout this document references to the MPC8250 are inclusive of its VR version unless otherwise specified. NOTE: Document Revision History Changes to this document are summarized in Table 23 on page 56. Features Figure 1 shows the block diagram for the MPC8250. 16 Kbytes I-Cache I-MMU G2 Core System Interface Unit (SIU) 16 Kbytes D-Cache D-MMU Bus Interface Unit 60x-to-PCI Bridge 60x-to-Local Bridge Memory C...