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9ZXL1950 Datasheet

Part Number 9ZXL1950
Manufacturers IDT
Logo IDT
Description 19-output DB1900Z Low-Power Derivative
Datasheet 9ZXL1950 Datasheet9ZXL1950 Datasheet (PDF)

19-output DB1900Z Low-Power Derivative w/85ohm Terminations 9ZXL1950 DATASHEET General Description The 9ZXL1950 is a DB1900Z derivative buffer utilizing Low-Power HCSL (LP-HCSL) outputs to increase edge rates on long traces, reduce board space, and reduce power consumption more than 50% from the original 9ZX21901.It is pin-compatible to the 9ZXL1930 and fully integrates the output terminations. It is suitable for PCI-Express Gen1/2/3 or QPI/UPI applications, and uses a fixed external feedback.

  9ZXL1950   9ZXL1950






Part Number 9ZXL1950
Manufacturers Renesas
Logo Renesas
Description Low-Power Derivative
Datasheet 9ZXL1950 Datasheet9ZXL1950 Datasheet (PDF)

19-Output DB1900Z Low-Power Derivative with 85ohm Terminations 9ZXL1950 DATASHEET General Description The 9ZXL1950 is a DB1900Z derivative buffer utilizing Low-Power HCSL (LP-HCSL) outputs to increase edge rates on long traces, reduce board space, and reduce power consumption more than 50% from the original 9ZX21901.It is pin-compatible to the 9ZXL1930 and fully integrates the output terminations. It is suitable for PCI-Express Gen1/2/3 or QPI/UPI applications, and uses a fixed external feedb.

  9ZXL1950   9ZXL1950







19-output DB1900Z Low-Power Derivative

19-output DB1900Z Low-Power Derivative w/85ohm Terminations 9ZXL1950 DATASHEET General Description The 9ZXL1950 is a DB1900Z derivative buffer utilizing Low-Power HCSL (LP-HCSL) outputs to increase edge rates on long traces, reduce board space, and reduce power consumption more than 50% from the original 9ZX21901.It is pin-compatible to the 9ZXL1930 and fully integrates the output terminations. It is suitable for PCI-Express Gen1/2/3 or QPI/UPI applications, and uses a fixed external feedback to maintain low drift for demanding QPI/UPI applications. Recommended Application Buffer for Romley, Grantley and Purley Servers Output Features 19 LP-HCSL output pairs w/integrated terminations (Zo = 85 Key Specifications • Cycle-to-cycle jitter: <50ps • Output-to-output skew: <50ps • Input-to-output delay variation: <50ps • Phase jitter: PCIe Gen3 <1ps rms • Phase jitter: QPI/UPI 9.6GB/s <0.2ps rms Features/Benefits • LP-HCSL outputs; up to 90% IO power reduction, better si.


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