A3R12E40DBF

A3R12E30DBF A3R12E40DBF 512Mb DDRII Synchronous DRAM 512Mb DDRII SDRAM Specification A3R12E30DBF A3R12E40DBF Zentel Electronics Corp. Revision 1.1 Nov., 2015 A3R12E30DBF A3R12E40DBF 512Mb DDRII Synchronous DRAM Specifications Features Density: 512 bits Organization − 16M words × 8 bits × 4 banks (A3R12E30DBF) − 8M words × 16 bits × 4 banks (A3R12E40DBF) Package − 60-ball FBGA(μBGA) (A3R12E30DBF) − 84-ball FBGA(μBGA) (A3R12E40DBF) − Lead-free (RoHS compliant) Power supply: VDD, VDDQ = 1.8V ± 0.1V Data rate: 1066Mbps/800Mbps (max.) 1KB page size (A3R12E30DBF) − Row address: A0 to A13 − Column address: A0 to A9 2KB page size (A3R12E40DBF) − Row address: A0 to A12 − Column address: A0 to A9 Four internal banks for concurrent operation Interface: SSTL_18 Burst lengths (BL): 4, 8 Burst type (BT): − Sequential (4, 8) − Interleave (4, 8) /CAS Latency (CL): 3, 4, 5, 6, 7 Precharge: auto Precharge option for ...