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A43L2616
1M X 16 Bit X 4 Banks Synchronous DRAM
Document Title 1M X 16 Bit X 4 Banks Synchronous DR...
www.DataSheet4U.com
A43L2616
1M X 16 Bit X 4 Banks Synchronous DRAM
Document Title 1M X 16 Bit X 4 Banks Synchronous DRAM Revision History
Rev. No.
0.0 1.0 2.0 3.0 3.1
History
Initial issue Add -V grade Add -5.5 spec Add Full Page Mode Add Pb-Free package type
Issue Date
August 9, 2001 November 26,2001 January 4,2002 February 21,2002 September 2, 2004
Remark
(September, 2004, Version 3.1)
AMIC Technology, Corp.
A43L2616
1M X 16 Bit X 4 Banks Synchronous DRAM
Features
JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks / Pulse RAS MRS cycle with address key programs - CAS Latency (2,3) - Burst Length (1,2,4,8 & full page) - Burst Type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock
Clock Frequency: 166MHz @ CL=3 143MHz @ CL=3 183Mhz @ CL=3 (183Mhz is available only for –V grade) Burst Read Single-bit Write operation DQM for masking Auto & self refresh 64ms refresh period (4K cycle) 54 Pin TSOP (II) Low Self Refresh Current version for –V grade
General Description
The A43L2616 is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 X 1,048,576 words by 16 bits, fabricated with AMIC’s high performance
CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable latencies allows the same device to be useful for a variety of high bandwidth, high ...