ACT5260111111

ACT5260 64-Bit Superscaler Microprocessor Features s s s s s Full militarized QED RM5260 microprocessor Dual Issue superscalar QED RISCMark™ - can issue one integer and one floating-point instruction per cycle microprocessor - can issue one integer and one floating-point instruction per cycle q 100, 133 and 150MHz frequency (200MHz future option) Consult Factory for latest speeds q 260 Dhrystone2.1 MIPS q SPECInt95 4.8. SPECfp95 5.1 High performance system interface compatible with R4600, R4700 and R5000 q 64-bit multiplexed system address/data bus for optimum price/performance up to 100 MHz operating frequency q High performance write protocols maximize uncached write bandwidth q Operates at input system clock multipliers of 2 through 8 q 5V tolerant I/O's q IEEE 1149.1 JTAG boundary scan Integrated on-chip caches - up to 3.2GBps internal data rate q 16KB instruction - 2 way set associative q 16KB data - 2 way set associative q Virtually indexed, physically tagged q Write-back and write-through on per page basis q Pipeline restart on first double for data cache misses Integrated memory management unit q Fully associative joint TLB (shared by I and D translations) q 48 dual entries map 96 pages q Variable page size (4KB to 16MB in 4x increments) s s s s s s s s Embedded supply de-coupling capacitors and Pll filter components High-performance floating point unit - up to 400 MFLOPS q Single cycle repeat rate for common single precision operations and some double pre...