DAC. AD5532B Datasheet

AD5532B Datasheet PDF


AD5532B
www.DataSheet4U.com
a
32-Channel, 14-Bit DAC with Precision
Infinite Sample-and-Hold Mode
AD5532B*
FEATURES
High Integration:
32-Channel DAC in 12 mm ؋ 12 mm CSPBGA
Guaranteed Monotonic to 14 Bits
Infinite Sample-and-Hold Capability to ؎0.018% Accuracy
Infinite Sample-and-Hold Total Unadjusted Error ؎2.5 mV
Adjustable Voltage Output Range
Readback Capability
DSP/Microcontroller Compatible Serial Interface
Output Impedance 0.5
Output Voltage Span 10 V
Temperature Range –40؇C to +85؇C
APPLICATIONS
Automatic Test Equipment
Optical Networks
Level Setting
Instrumentation
Industrial Control Systems
Data Acquisition
Low Cost I/O
GENERAL DESCRIPTION
The AD5532B is a 32-channel, voltage output, 14-bit DAC with
an additional precision infinite sample-and-hold mode. The
selected DAC register is written to via the 3-wire serial inter-
face and VOUT for this DAC is then updated to reflect the new
contents of the DAC register. DAC selection is accomplished via
address bits A0–A4. The output voltage range is determined by
the offset voltage at the OFFS_IN pin and the gain of the
output amplifier. It is restricted to a range from VSS + 2 V to
VDD – 2 V because of the headroom of the output amplifier.
The device is operated with AVCC = +5 V ± 5%, DVCC = +2.7 V
to +5.25 V, VSS = –4.75 V to –16.5 V, and VDD = +8 V to +16.5 V
and requires a stable 3 V reference on REF_IN as well as an
offset voltage on OFFS_IN.
PRODUCT HIGHLIGHTS
1. 32-channel, 14-bit DAC in one package, guaranteed
monotonic.
2. The AD5532B is available in a 74-lead CSPBGA with a body
size of 12 mm ϫ 12 mm.
3. In infinite sample-and-hold mode, a total unadjusted error of
± 2.5 mV is achieved by laser-trimming on-chip resistors.
FUNCTIONAL BLOCK DIAGRAM
DVCC AVCC
REF IN REF OUT OFFS IN
VDD VSS
AD5532B
VIN
TRACK / RESET
BUSY
DAC GND
AGND
DGND
SER /PAR
ADC
MUX
DAC
14-BIT
BUS
DAC
MODE
INTERFACE
CONTROL
LOGIC
DAC
ADDRESS INPUT REGISTER
SCLK DIN DOUT
SYNC / CS A4–A0 CAL OFFSET_SEL
VOUT 0
VOUT 31
OFFS OUT
WR
*Protected by U.S. Patent No. 5,969,657; other patents pending.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002


Part AD5532B
Description 14-Bit DAC
Feature AD5532B; www.DataSheet4U.com a 32-Channel, 14-Bit DAC with Precision Infinite Sample-and-Hold Mode AD5532B*.
Manufacture Analog Devices
Datasheet
Download AD5532B Datasheet


www.DataSheet4U.com a 32-Channel, 14-Bit DAC with Precisio AD5532B Datasheet





AD5532B
AD5532B–SPECIFICATIONS (VDD = +8 V to +16.5 V, VSS = –4.75 V to –16.5 V; AVCC = +4.75 V to +5.25 V;
DVCC = +2.7 V to +5.25 V; AGND = DGND = DAC_GND = 0 V; REF_IN = 3 V;
OFFS_IN = OV; Output Range from VSS + 2 V to VDD – 2 V. All outputs unloaded. All specifications TMIN to TMAX, unless otherwise noted.)
Parameter1
DAC DC PERFORMANCE
Resolution
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
Offset
Gain
Full-Scale Error
ISHA DC PERFORMANCE
VIN to VOUT Nonlinearity3
Total Unadjusted Error (TUE)
Offset Error
Gain
ISHA ANALOG INPUT (VIN)
Input Voltage Range
Input Lower Dead Band
Input Upper Dead Band
Input Current
Input Capacitance4
ANALOG INPUT (OFFS_IN)
Input Current
Input Voltage Range
VOLTAGE REFERENCE
REF_IN
Nominal Input Voltage
Input Voltage Range4
Input Current
REF_OUT
Output Voltage
Output Impedance4
Reference Temperature Coefficient4
ANALOG OUTPUTS (VOUT 0–31)
Output Temperature Coefficient4, 5
DC Output Impedance4
Output Range
Resistive Load4, 6
Capacitive Load4, 6
Short-Circuit Current4
DC Power-Supply Rejection Ratio4
DC Crosstalk4
ANALOG OUTPUT (OFFS_OUT)
Output Temperature Coefficient4, 5
DC Output Impedance4
Output Range
Output Current
Capacitive Load
AD5532B-1
B Version2
14
± 0.39
±1
90/170/250
3.52
–1/+0.5
± 0.006
± 0.018
± 2.5
± 12
±1
± 10
3.51/3.52/3.53
0 to 3
70
40
1
20
1
0/4
Unit
Bits
% of FSR max
LSB max
mV min/typ/max
typ
% of FSR max
% typ
% max
mV typ
mV max
mV typ
mV max
min/typ/max
V
mV max
mV max
µA max
pF typ
µA max
V min/max
Conditions/ Comments
± 0.15% typ
± 0.5 LSB typ Monotonic
See Figure 6.
After Offset and Gain Adjustment
See TPC 6.
Nominal Input Range
50 mV typ. Referred to VIN.
See Figure 7.
12 mV typ. Referred to VIN.
See Figure 7.
100 nA typ. VIN acquired
on one channel.
100 nA typ
Output Range Restricted from
VSS + 2 V to VDD – 2 V
3.0
2.85/3.15
1
3
280
60
V typ
V min/max
µA max
V typ
ktyp
ppm/°C typ
10
0.5
VSS + 2/VDD – 2
5
100
7
–70
–70
250
ppm/°C typ
typ
V min/max
kmin
pF max
mA typ
dB
dB
µV max
10
1.3
50 to REF_IN – 12
10
100
ppm/°C typ
ktyp
mV typ
µA max
pF max
<1 nA typ
100 µA Output Load
VDD = +15 V ± 5%
VSS = Ϫ15 V ± 5%
Outputs Loaded
Source Current
–2– REV. A



AD5532B
Parameter1
AD5532B-1
B Version2
DIGITAL INPUTS7
Input Current
Input Low Voltage
Input High Voltage
Input Hysteresis (SCLK and CS Only)
Input Capacitance
DIGITAL OUTPUTS (BUSY, DOUT)7
Output Low Voltage, DVCC = 5 V
Output High Voltage, DVCC = 5 V
Output Low Voltage, DVCC = 3 V
Output High Voltage, DVCC = 3 V
High Impedance Leakage Current
High Impedance Output Capacitance
± 10
0.8
0.4
2.4
2.0
200
10
0.4
4.0
0.4
2.4
±1
15
POWER REQUIREMENTS
Power Supply Voltages
VDD
VSS
AVCC
DVCC
Power Supply Currents8
IDD
ISS
AICC
DICC
Power Dissipation8
8/16.5
–4.75/–16.5
4.75/5.25
2.7/5.25
15
15
33
1.5
280
NOTES
1See Terminology section.
2B Version: Industrial temperature range –40°C to +85°C; typical at +25°C.
3Input range 100 mV to 2.96 V.
4Guaranteed by design and characterization, not production tested.
5AD780 as reference for the AD5532B.
6Ensure that you do not exceed TJ (max). See Absolute Maximum Ratings section.
7Guaranteed by design and characterization, not production tested.
8Output unloaded.
Specifications subject to change without notice.
Unit
µA max
V max
V max
V min
V min
mV typ
pF max
V max
V min
V max
V min
µA max
pF typ
V min/max
V min/max
V min/max
V min/max
mA max
mA max
mA max
mA max
mW typ
AD5532B
Conditions/Comments
± 5 µA typ
DVCC = 5 V ± 5%
DVCC = 3 V ± 10%
DVCC = 5 V ± 5%
DVCC = 3 V ± 10%
Sinking 200 µA
Sourcing 200 µA
Sinking 200 µA
Sourcing 200 µA
DOUT Only
DOUT Only
10 mA typ. All channels full-scale.
10 mA typ. All channels full-scale.
26 mA typ
1 mA typ
VDD = +10 V, VSS = –5 V
REV. A
–3–




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