AD7626

16-Bit, 10 MSPS, PulSAR Differential ADC AD7626 FEATURES Throughput: 10 MSPS SNR: 91.5 dB 16-bit no missing codes INL: ±0.45 LSB DNL: ±0.35 LSB Power dissipation: 136mW 32-lead LFCSP (5 mm × 5 mm) SAR architecture No latency/no pipeline delay 16-bit resolution with no missing codes Zero error: ±1LSB Differential input range: ±4.096 V Serial LVDS interface Self-clocked mode Echoed-clock mode LVDS or CMOS option for conversion control (CNV signal) Reference options Internal: 4.096 V External (1.2 V) buffered to 4.096 V External: 4.096 V FUNCTIONAL BLOCK DIAGRAM REFIN REF VCM 1.2V BAND GAP IN+ IN– CAP DAC VIO LOGIC CNV+, CNV– D+, D– CLK+, CLK– 07648-001 ÷2 CLOCK AD7626 SAR SERIAL LVDS DCO+, DCO– Figure 1. GENERAL DESCRIPTION The AD7626 is a 16-bit, 10 MSPS, charge redistribution successive approximation register (SAR) based architecture analog-to-digital converter (ADC). SAR architecture allows unmatched performance both in noise (91.5 dB SNR) and in linearity (±0.45 LSB INL). The AD7626 contains a high speed, 16-bit sampling ADC, an internal conversion clock, and an internal buffered reference. On the CNV edge, it samples the voltage difference between the IN+ and IN− pins. The voltages on these pins swing in opposite phase between 0 V and REF. The 4.096 V reference voltage, REF, can be generated internally or applied externally. All converted results are available on a single LVDS self-clocked or echoed-clock serial interface, reducing external hardware connections. T...