Buffered 24-Bit Sigma-Delta ADC
Data Sheet
FEATURES
Power Supply: 2.5 V to 5.25 V operation Normal: 75 μA max Power-down: 1 μA max
RMS noise: 1.1 μV at ...
Description
Data Sheet
FEATURES
Power Supply: 2.5 V to 5.25 V operation Normal: 75 μA max Power-down: 1 μA max
RMS noise: 1.1 μV at 9.5 Hz update rate 19.5-bit p-p resolution (22 bits effective resolution) Integral nonlinearity: 3.5 ppm typical Simultaneous 50 Hz and 60 Hz rejection Internal clock oscillator Rail-to-rail input buffer VDD monitor channel Temperature range: –40°C to +105°C 10-lead MSOP
INTERFACE
3-wire serial SPI®, QSPI™, MICROWIRE™, and DSP compatible Schmitt trigger on SCLK
APPLICATIONS
Smart transmitters Battery applications Portable instrumentation Sensor measurement Temperature measurement Pressure measurement Weigh scales 4 to 20 mA loops
Low Power, Buffered 24-Bit Sigma-Delta ADC
AD7791
FUNCTIONAL BLOCK DIAGRAM
GND VDD REFIN(+) REFIN(–)
VDD
CLOCK
AIN(+) AIN(–)
GND
BUF
- ADC
AD7791
Figure 1.
SERIAL INTERFACE
DOUT/RDY DIN SCLK CS
04227-0-001
GENERAL DESCRIPTION
The AD7791 is a low power, complete analog front end for low frequency measurement...
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