AD9267

10 MHz Bandwidth, 640 MSPS Dual Continuous Time Sigma-Delta Modulator AD9267 FEATURES SNR: 83 dB (85 dBFS) to 10 MHz input SFDR: −88 dBc to 10 MHz input Noise figure: 15 dB Input impedance: 1 kΩ Power: 416 mW 10 MHz real or 20 MHz complex bandwidth 1.8 V analog supply operation On-chip PLL clock multiplier On-chip voltage reference Twos complement data format 640 MSPS, 4-bit LVDS data output Serial control interface (SPI) FUNCTIONAL BLOCK DIAGRAM AVDD PDWNB PDWNA DRVDD OR±A VIN+A VIN–A LVDS DRIVERS Σ -Δ MODULATOR D3±A D0±A PLL_LOCKED PLLMULT4 PLLMULT3 PLLMULT2 CLK+ CLK– DCO± AD9267 VREF CFILT VIN–B VIN+B Σ -Δ MODULATOR PHASELOCKED LOOP LVDS DRIVERS D3±B D0±B OR±B 07773-001 APPLICATIONS Baseband quadrature receivers: CDMA2000, W-CDMA, multicarrier GSM/EDGE, 802.16x, and LTE Quadrature sampling instrumentation SERIAL INTERFACE AGND SDIO/ PLLMULT1 SCLK/ PLLMULT0 CSB DGND GENERAL DESCRIPTION The AD9267 is a dual continuous time (CT) sigma-delta (Σ-Δ) modulator with −88 dBc of dynamic range over 10 MHz real or 20 MHz complex bandwidth. The combination of high dynamic range, wide bandwidth, and characteristics unique to the continuous time Σ-Δ modulator architecture makes the AD9267 an ideal solution for wireless communication systems. The AD9267 has a resistive input impedance that significantly relaxes the requirements of the driver amplifier. In addition, a 32× oversampled fifth-order continuous time loop filter attenuates out-of-band signals and aliases, reducin...