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AD9511 Datasheet

Part Number AD9511
Manufacturers Analog Devices
Logo Analog Devices
Description 1.2 GHz Clock Distribution IC
Datasheet AD9511 DatasheetAD9511 Datasheet (PDF)

1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs AD9511 FEATURES Low phase noise phase-locked loop core Reference input frequencies to 250 MHz Programmable dual-modulus prescaler Programmable charge pump (CP) current Separate CP supply (VCPS) extends tuning range Two 1.6 GHz, differential clock inputs 5 programmable dividers, 1 to 32, all integers Phase select for output-to-output coarse delay adjust 3 independent 1.2 GHz LVPECL outputs Additive output jitter 225 fs.

  AD9511   AD9511






Part Number AD9518-4
Manufacturers Analog Devices
Logo Analog Devices
Description 6-Output Clock Generator
Datasheet AD9511 DatasheetAD9518-4 Datasheet (PDF)

Data Sheet FEATURES Low phase noise, phase-locked loop (PLL) On-chip VCO tunes from 1.45 GHz to 1.80 GHz External VCO/VCXO to 2.4 GHz optional 1 differential or 2 single-ended reference inputs Reference monitoring capability Automatic revertive and manual reference switchover/holdover modes Accepts LVPECL, LVDS, or CMOS references to 250 MHz Programmable delays in path to PFD Digital or analog lock detect, selectable 3 pairs of 1.6 GHz LVPECL outputs Each output pair shares a 1-to-32 divider wit.

  AD9511   AD9511







Part Number AD9518-3
Manufacturers Analog Devices
Logo Analog Devices
Description 6-Output Clock Generator
Datasheet AD9511 DatasheetAD9518-3 Datasheet (PDF)

Data Sheet FEATURES Low phase noise, phase-locked loop (PLL) On-chip VCO tunes from 1.75 GHz to 2.25 GHz External VCO/VCXO to 2.4 GHz optional 1 differential or 2 single-ended reference inputs Reference monitoring capability Automatic revertive and manual reference switchover/holdover modes Accepts LVPECL, LVDS, or CMOS references to 250 MHz Programmable delays in path to PFD Digital or analog lock detect, selectable 3 pairs of 1.6 GHz LVPECL outputs Each output pair shares a 1-to-32 divider wit.

  AD9511   AD9511







Part Number AD9518-2
Manufacturers Analog Devices
Logo Analog Devices
Description 6-Output Clock Generator
Datasheet AD9511 DatasheetAD9518-2 Datasheet (PDF)

Data Sheet FEATURES Low phase noise, phase-locked loop (PLL) On-chip VCO tunes from 2.05 GHz to 2.33 GHz External VCO/VCXO to 2.4 GHz optional 1 differential or 2 single-ended reference inputs Reference monitoring capability Automatic revertive and manual reference switchover/holdover modes Accepts LVPECL, LVDS, or CMOS references to 250 MHz Programmable delays in path to PFD Digital or analog lock detect, selectable 3 pairs of 1.6 GHz LVPECL outputs Each output pair shares a 1-to-32 divider wit.

  AD9511   AD9511







Part Number AD9518-1
Manufacturers Analog Devices
Logo Analog Devices
Description 6-Output Clock Generator
Datasheet AD9511 DatasheetAD9518-1 Datasheet (PDF)

Data Sheet FEATURES Low phase noise, phase-locked loop (PLL) On-chip VCO tunes from 2.30 GHz to 2.65 GHz External VCO/VCXO to 2.4 GHz optional 1 differential or 2 single-ended reference inputs Reference monitoring capability Automatic revertive and manual reference switchover/holdover modes Accepts LVPECL, LVDS, or CMOS references to 250 MHz Programmable delays in path to PFD Digital or analog lock detect, selectable 3 pairs of 1.6 GHz LVPECL outputs Each output pair shares a 1-to-32 divider wit.

  AD9511   AD9511







Part Number AD9518-0
Manufacturers Analog Devices
Logo Analog Devices
Description 6-Output Clock Generator
Datasheet AD9511 DatasheetAD9518-0 Datasheet (PDF)

Data Sheet FEATURES Low phase noise, phase-locked loop (PLL) On-chip VCO tunes from 2.55 GHz to 2.95 GHz External VCO/VCXO to 2.4 GHz optional 1 differential or 2 single-ended reference inputs Reference monitoring capability Automatic revertive and manual reference switchover/holdover modes Accepts LVPECL, LVDS, or CMOS references to 250 MHz Programmable delays in path to PFD Digital or analog lock detect, selectable 3 pairs of 1.6 GHz LVPECL outputs Each output pair shares a 1-to-32 divider wit.

  AD9511   AD9511







1.2 GHz Clock Distribution IC

1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs AD9511 FEATURES Low phase noise phase-locked loop core Reference input frequencies to 250 MHz Programmable dual-modulus prescaler Programmable charge pump (CP) current Separate CP supply (VCPS) extends tuning range Two 1.6 GHz, differential clock inputs 5 programmable dividers, 1 to 32, all integers Phase select for output-to-output coarse delay adjust 3 independent 1.2 GHz LVPECL outputs Additive output jitter 225 fs rms 2 independent 800 MHz/250 MHz LVDS/CMOS clock outputs Additive output jitter 275 fs rms Fine delay adjust on 1 LVDS/CMOS output Serial control port Space-saving 48-lead LFCSP APPLICATIONS Low jitter, low phase noise clock distribution Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers High performance instrumentation Broadband infrastructure GENERAL DESCRIPTION The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core. The design emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this part. The PLL section consists of a programmable reference divider (R); a low noise phase frequency detector (PFD); a precision charge pump (CP); and a programmable feedback divider (N). By connecting an external VCXO or VCO to the CLK2/CLK2B pins, frequencies up to 1.6 GHz may be synchronized to the input re.


2006-01-24 : C154A    25PPC405EP    50N024    80C535    SOT89    HI1-509A    UCA65107N    UCA65108N    UCA65110N    UCA7493N   


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