AD9956

2.7 GHz DDS-Based AgileRFTM Synthesizer AD9956 FEATURES 400 MSPS internal DDS clock speed 48-bit frequency tuning word 14-bit programmable phase offset Integrated 14-bit DAC Excellent dynamic performance Phase noise ≤ 135 dBc/Hz @ 1 KHz offset −80 dB SFDR @ 160 MHz (±100 KHz offset IOUT) 25 Mb/s write-speed serial I/O control 200 MHz phase frequency detector inputs 655 MHz programmable input dividers for the phase frequency detector (÷M, ÷N) {M, N = 1..16} (bypassable) Programmable RF divider (÷R) {R = 1, 2, 4, 8} (bypassable) 8 phase/frequency profiles 1.8 V supply for device operation 3.3 V supply for I/O and charge pump Software controlled power-down 48-lead LFCSP package Automatic linear frequency sweeping capability (in DDS) Programmable charge pump current (up to 4 mA) Phase modulation capability Multichip synchronization Dual-mode PLL lock detect 655 MHz CML-mode PECL-compliant driver APPLICATIONS Agile LO frequency synthesis FM chirp source for radar and scanning systems Automotive radars Test and measurement equipment Acousto-optic device drivers FUNCTIONAL BLOCK DIAGRAM DAC_RSET DELTA FREQUENCY TUNING WORD FREQUENCY ACCUMULATOR PLL_LOCK/SYNC_IN I/O_UPDATE DELTA FREQUENCY 24 RAMP RATE 16 48 PHASE DDS CORE OFFSET 19 PHASE TO 14 AMPLITUDE PHASE CONVERSION ACCUMULATOR FTW 48 PHASE OFFSET 14 WORD SYSCLK TIMING AND CONTROL LOGIC DAC SYSCLK SYNC_OUT REFCLK REFCLK SYNC_CLK RF-DIVIDER ÷R CML CLOCK DRIVER SYSCLK ÷4 3 OSCILLATOR BUFFER LOCK DETEC...