ADATE305

www.DataSheet4U.net 250 MHz Dual Integrated DCL with Level Setting DACs, Per Pin PMU, and Per Chip VHH ADATE305 FEATURES Driver 3-level driver with high-Z mode and built-in clamps Precision trimmed output resistance Low leakage mode (typically <10 nA) Voltage range: up to −2.0 V to +6.0 V 1.6 ns minimum pulse width, 2 V terminated 2.1 ns minimum pulse width, 3 V terminated Comparator Window and differential comparator 500 MHz input equivalent bandwidth Load ±12 mA maximum current capability Per pin PMU Force voltage range: up to −2.0 V to +6.0 V 5 current ranges: 32 mA, 2 mA, 200 μA, 20 μA, 2 μA Levels 14-bit DAC for DCL levels Typically < ±5 mV INL (calibrated) 16-bit DAC for PMU levels Typically < ±1.5 mV INL (calibrated) linearity in FV mode HVOUT output buffer 0 V to 13.5 V output range 100-lead, 14 mm × 14 mm, TQFP_EP package 900 mW per channel with no load GENERAL DESCRIPTION The ADATE305 is a complete, single-chip solution that performs the pin electronic functions of the driver, the comparator, and the active load (DCL), per pin PMU, and dc levels for ATE applications. The device also contains an HVOUT driver with a VHH buffer capable of generating up to 13.5 V. The driver features three active states: data high mode, data low mode, and term mode, as well as an inhibit state. The inhibit state, in conjunction with the integrated dynamic clamp, facilitates the implementation of a high speed active termination. The ADATE305 supports two output voltage ranges: −2.0 V t...